Posts Tagged ‘ARM’
Thursday, December 7th, 2017
This week on Thursday, December 14th, the second annual edition of REUSE 2017 will unfold in Silicon Valley. It’s a gathering crafted specifically for the vendors of IP blocks, and now whole sub-systems, those pieces of the puzzle which allow the vendors’ customers to design and produce electronic products more efficiently and with better results.
It goes without saying that IP is a pivotal part of the semiconductor supply chain today. Organizations like Arm and Synopsys reap huge benefits from being among the principal suppliers of that IP. But there are hundreds of IP companies in the world – big, medium, and small – that also provide IP.
Potentially, they could all be participating in something like Reuse 2017. Arm, for instance, is participating in the conference, along with dozens of smaller companies. Synopsys, however, is not.
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Tags: Achronix, Aldec, Andes Technology, Aphion, Archband, ARM, Avery Design Systems, CAST, Certus Semiconductor, ChipEstimate.com, City Semiconductor, Corigine, DAC, eFabless, FlexLogix, Intel, Intrinsic ID, IP-SoC, Menta, Mixel, Mobile Semiconductor, Mobiveil, Moortec, NSCore, NVM Engines, OmniDesign, Open-Silicon, QuickLogic, Reuse 2017, RISC-V, Samsung, Semi IP Systems, SiFive, Silicon Creations, Silvaco, Sintegra, SmartFlow, Sofics, Sonics, Surecore, Synopsys, True Circuits, Uniquify No Comments »
Thursday, November 30th, 2017
San Jose-based Sonics is a long-established IP vendor specializing in On-chip Networks [NoC] and Energy Processing Units [EPU]. Co-founded by CEO Grant Pierce and CTO Drew Wingard, the company has 150 parents and has “supported customer products that have shipped more than 4 billion SoCs.”
Currently Grant Pierce is an exceptionally busy man. Not only is he leading Sonics, he’s also serving as Chair of the ESD Alliance. It’s a fortunate circumstance to have Pierce leading the Alliance; his point of view is exactly what’s needed to help shape what was originally an EDA-focused organization into something that embraces the full set of constituencies driving electronic system design today. Pierce is strongly committed to new technologies and the small companies that drive the innovation.
Pierce and I spoke by phone in late November. He is clearly very enthused about the company and the ESD Alliance.
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Tags: Aart de Geus, ARM, Design Automation Conference, Drew Wingard, EPU, Gary Smith, Grant Pierce, IoT, Joe Costello, MIPS, Moortec, NoC, Reuse 2017, Robin Saxby, SoftBank, Sonics, Tallwood No Comments »
Thursday, October 5th, 2017
Hangzhou C-SKY Microsystems, a 32-bit CPU vendor, became a member of the ESD Alliance in 2016 and was described at the time as “the first IP company from China to join.”
Founded in 2001, C-Sky has “developed 7 types of embedded CPUs covering a wide range of embedded applications including smart devices in IoT, digital audio and video, information security, network and communications, industrial control and automotive electronics. It is the only embedded CPU volume provider in China with its own instruction set architecture, the Yun-on-Chip architecture developed in conjunction with Alibaba.”
C-Sky is a growing IP company serving an enormous market. I spoke recently by phone with Dr. Xiaoning Qi, CEO at C-Sky, who was in California attending meetings. No stranger to Silicon Valley, he previously served at Intel, Rambus, Synopsys, and Sun, after completing his Ph.D. under Prof. Robert Dutton at Stanford.
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Tags: Aart de Geus, Alibaba, ARM, Asia-Pacific Leadership Council, Bob Smith, C-Sky Microsystem Corp., Chenming Hu, Chi-Foon Chan, Chinese American Semiconductor Professional Association, ESD Alliance, GSA, IEEE, Intel, Mentor Graphics, Microsoft, NB-IoT, Rambus, Robert Dutton, SMIC, Stanford, Subhasish Mitra, Sun Microsystems, Synopsys, TSMC, Wally Rhines, Xiaoning Qi, ZTE 1 Comment »
Wednesday, July 12th, 2017
It’s been a year since two cataclysmic news bits hit the wires, the two stories not unrelated.
The UK decided to Brexit the EU on 23 June 2016, and ARM announced it had been sold to Tokyo-based SoftBank three weeks later, on 18 July 2016. For some, these developments would have been unthinkable up to the moment they unfolded, but now they’re both a reality.
Article 50 was triggered by the British PM on 29 March 2017, and the UK will no longer be in the EU as of March 2019.
ARM is no longer publicly traded, and although it was once the crown jewel of Britain’s technical portfolio, it is now a wholly owned Japanese enterprise. Or at least it was, until 7 March 2017 when SoftBank announced an even more astonishing bit of news.
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Tags: Apple, ARM, Article 50, Brexit, ESD Alliance, European Union, Foxconn, Gareth Corfield, Qualcomm, Saudi Arabia, Sharp, Simon Segars, SoftBank, Theresa May, UAE, Vision Fund No Comments »
Thursday, June 15th, 2017
UltraSoC is on a roll, having just wrapped up an energetic participation in the last month’s RISC-V conference in Shanghai, where UltraSoC CTO Gadge Panesar was a speaker. Additionally, the company is announcing “new funding, new investors, and new board members” – including UC Berkeley’s Alberto Sangiovanni-Vincentelli.
When I spoke this week with company CEO Rupert Baines, he started with Shanghai: “There is so much interest in RISC-V in China. The attendance there [exceeded] the headcount at the previous meetings at Google and MIT, although the numbers may be confusing as there were so many students at the Shanghai event.”
Asked if the RISC-V event would be in China again, Baines said, “I believe going forward there will be one conference in the U.S. each year, probably in Silicon Valley, and one international. Nvidia sponsored the latest one through their presence in Shanghai.”
Turning to UltraSoC, I asked about the company’s origin, market and competition.
Baines said, “We do semiconductor IP that solves a problem. The chips are so big and complicated today, understanding how they work – with lots of processors and lots of software interacting with each other and the real world – is incredibly difficult.
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Tags: Alberto Sangiovanni-Vincentelli, ARM, ARM TechCon, CEVA, Design Automation Conference 2017, Gadge Panesar, HiSilicon, Imagination, Microsemi, MIPS, Movidius, RISC-V, Rupert Baines, Tensilica, UltraSoC 1 Comment »
Thursday, May 25th, 2017
This conversation with Hal Barbour, Chairman at CAST IP, is the second of four dialogs about Grand Challenges in IP.
The first installment in the series, published last week, was a conversation with Sonics co-Founder and CEO Grant Pierce.
Pierce argues that today’s Grand Challenges in IP center around the complexities of delivering sub-systems and related technical expertise to customers, helping develop edge-node devices targeted at Machine Learning, and providing IP for myriad automotive systems – all while meeting demands for greater bandwidth and throughput, and astonishingly low power.
In this week’s installment in the series, Hal Barbour talks about a completely different set of Grand Challenges in IP – those related to the business issues surrounding the industry.
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Tags: ARM, Beyond Semiconductor, Cadence, CAST IP, Fraunhofer Institute, Hal Barbour, Mentor Graphics, Nikos Zervas, Ocean Logic, Paul Lindemann, Sandgate, Silesia Devices, SoC Solutions, SoftBank, Synopsys, View Logic 1 Comment »
Thursday, May 18th, 2017
Here begins the first of four dialogs about Grand Challenges in IP. This first installment is a conversation with Sonics co-Founder and CEO Grant Pierce, who also currently serves as Chair of the ESD Alliance. We spoke by phone earlier this week.
Asked to enumerate the Grand Challenges in IP he sees today, Pierce began: “Having been in the industry for 20 years myself, I am surprised that we still have some challenges ahead of us. We have new entrants into the industry that are more focused at the system level, however, with customers coming in to interact with the IP guys directly to get their custom designs done.
“What I am seeing today, versus 20 years ago, is the emergence of Machine Learning. And that brings with it some technical challenges. On the one hand, they are very familiar – the age-old challenges about bandwidth and throughput – but on the other hand, they are also very new. Today’s applications are driving things together in a totally new way.
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Tags: ARM, ESD Alliance, Grant Pierce, Intel, Machine Learning, Miles Davis, MIPS, NVIDIA, RISC architecture, Sonics 3 Comments »
Thursday, April 20th, 2017
There’s two kinds of conversations when it comes to electrical systems and cars. One is about the power train and the other one is about the advanced driver-assistance system, ADAS. Distinct as they may be, both of these systems can benefit from the optimizations associated with design automation, and both of these systems today are mashed up against the complexities of using third-party IP.
Chips in cars today need to manage the power train, or they need to provide safety and security for the driver – but either way, they need to work perfectly every time, all the time, and in some pretty hellish conditions. It’s hot under the hood and the road today is unforgiving. So are the lawyers.
So what’s a third-party IP provider supposed to do? Turn tail and run? Never sell into the automotive market where litigation looms larger than a sandstorm in April on the Texas Panhandle? Or try to man-up and work with the automotive market to provide IP that fits well into the chips that such customers need?
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Tags: 2017 Design Automation Conferencen, Anis Jarrar, ARM, Neil Stroud, NetSpeed Systems, NXP, Rajesh Ramanujam, Texas, Warren Savage No Comments »
Thursday, April 13th, 2017
Something eerie and inexplicable happened on Thursday evening, April 6th. Out of nowhere, an intense storm swept through the Bay Area, unannounced and without warning. The skies darkened, the winds howled, severe rain pelted the crowded, suddenly dangerous freeways, and hundreds of thousands lost power.
Meanwhile, exactly in the midst of the most violent part of this mysterious storm, the CEOs of the four most important companies within the ESD Alliance sat on stools in front of an audience assembled at Synopsys and chatted about this, that, and the other. Seemingly oblivious to the profound violence unleashing itself just outside the windows, they acted as if nothing was amiss.
Everything in the industry – and the world – was in order: Wonderful, with the data pointing continuously up and to the right, and everywhere ample evidence for a bullish, optimistic, and excited outlook on the future of EDA and IP.
No matter that Nature was having its way out there in the darkness, that the U.S. had bombed Syria the hour before their discussion began, that the drumbeat for answers about entanglements with Russia was quickening, or difficult conversations with the President of the PRC were underway that very day in Florida – the CEOs of Synopsys, Cadence, Siemens/Mentor Graphics and SoftBank/ARM sat relaxed and easy, basking in the evident vitality of the EDA and IP industries, and allowing themselves to be shepherded through a congenial confab of confident chit-chat by Ed Sperling of Semiconductor Engineering fame.
That fact that the vagaries of Nature never came into the conversation was not surprising; the fact the Mr. Sperling refused all opportunities to bring what he termed as “politics” into the conversation was quite the opposite. Surprising, that is.
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Tags: Aart de Geus, ARM, Brexit, Cadence, Ed Sperling, ESD Alliance, H1-B visas, Lip-Bu Tan, Mentor Graphics, Semiconductor Engineering, Siemens, Simon Segars, SoftBank, Synopsys, Walden C. Rhines 2 Comments »
Thursday, February 9th, 2017
This week, the ESD Alliance announced that Sonics CEO Grant Pierce has been elected chair of the organization’s Board of Directors. His election is unique in several ways: Pierce is the first CEO of an IP company to lead the Alliance; he replaces two co-chairs, Cadence CEO Lip-Bu Tan and PDF Solutions, John Kibarian; and he is only the second CEO of a non-publicly traded company to serve as Board Chair, the other being Jasper CEO Kathryn Kranen who took the reins in 2012.
When Pierce and I spoke by phone on Tuesday about his election, he noted the unique circumstances of his new leadership role: “When I joined the board several years ago, it was with the intention to add a new point of view to what was then the EDA Consortium, to help the organization reflect the emerging reality of what was happening in the marketplace with respect to IP companies.
“In some ways, the IP companies consider themselves to be a necessary evil. Every chip developed today involves some sort of third-party IP, so having a place on the Board of the ESD Alliance is essential.”
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Tags: Aart de Geus, Amit Gupta, ARM, Bob Smith, Cadence, Cadence Design Systems, Dean Drako, EDA Consortium, EDAC, ESD Alliance, ESDA, IC Manage, John Kibarian, Lanza techVentures, Lip-Bu Tan, Lucio Lanza, Mentor Graphics, PDF Solutions, Simon Segars, Solido Design Automation, Sonics, Synopsys, Wally Rhines No Comments »
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