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Posts Tagged ‘eFabless’

REUSE 2017: Opportunity knocks, Who’s answering

Thursday, December 7th, 2017

 


This week on Thursday, December 14th
, the second annual edition of REUSE 2017 will unfold in Silicon Valley. It’s a gathering crafted specifically for the vendors of IP blocks, and now whole sub-systems, those pieces of the puzzle which allow the vendors’ customers to design and produce electronic products more efficiently and with better results.

It goes without saying that IP is a pivotal part of the semiconductor supply chain today. Organizations like Arm and Synopsys reap huge benefits from being among the principal suppliers of that IP. But there are hundreds of IP companies in the world – big, medium, and small – that also provide IP.

Potentially, they could all be participating in something like Reuse 2017. Arm, for instance, is participating in the conference, along with dozens of smaller companies. Synopsys, however, is not.

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IP Design Challenge: efabless & X-FAB promote Ingenuity, February deadline

Wednesday, December 7th, 2016

 


If you’re a designer looking for a rare opportunity to shine, look no further
. The folks at Erfurt-based X-FAB and Silicon Valley-based efabless hope to “further ingenuity” by extending a challenge to anyone in the world willing to accept it.

What they’re looking for are IP designs applicable to an ultra-low power voltage reference, and the companies are willing to make it worth your while.

If your design is one of the top three selected, you’ll receive a monetary award and your IP will be made available to a global customer base through both X-FAB’s IP web portal and efabless’ online marketplace.

Best of all – you’ll hold onto all rights for your submission.

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Lanza Panel at DAC: Democratization is not Open Source

Thursday, July 14th, 2016

 


Long-time EDA investor Lucio Lanza lead a fascinating, albeit mystifying, discussion
in the DAC Pavilion on Monday, July 6th, in Austin. His panelists included IPextreme’s Warren Savage, Scientific Ventures’ Mark Templeton, and eFabless’ Michael Wishart, with the topic under discussion being open source.

The session was titled “Daring to Move to Open Source” and was described thusly: “The emerging Internet of Things market is destined to upend that time-tested ‘advanced-node’ model, as developers opt for older, less costly process technologies, using commodity design tools and selecting proven IP blocks to quickly and efficiently assemble chips. As demand for IoT devices grows exponentially, might open source EDA tools and IP become viable, or even the winning combination that enables the low-cost design of an IoT SoC?”

Here are some soundbites from the panelists.

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DownStream: Solutions for Post Processing PCB Designs
TrueCircuits: IoTPLL
DAC2018



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