Posts Tagged ‘Andes Technology’
Thursday, December 7th, 2017
This week on Thursday, December 14th, the second annual edition of REUSE 2017 will unfold in Silicon Valley. It’s a gathering crafted specifically for the vendors of IP blocks, and now whole sub-systems, those pieces of the puzzle which allow the vendors’ customers to design and produce electronic products more efficiently and with better results.
It goes without saying that IP is a pivotal part of the semiconductor supply chain today. Organizations like Arm and Synopsys reap huge benefits from being among the principal suppliers of that IP. But there are hundreds of IP companies in the world – big, medium, and small – that also provide IP.
Potentially, they could all be participating in something like Reuse 2017. Arm, for instance, is participating in the conference, along with dozens of smaller companies. Synopsys, however, is not.
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Tags: Achronix, Aldec, Andes Technology, Aphion, Archband, ARM, Avery Design Systems, CAST, Certus Semiconductor, ChipEstimate.com, City Semiconductor, Corigine, DAC, eFabless, FlexLogix, Intel, Intrinsic ID, IP-SoC, Menta, Mixel, Mobile Semiconductor, Mobiveil, Moortec, NSCore, NVM Engines, OmniDesign, Open-Silicon, QuickLogic, Reuse 2017, RISC-V, Samsung, Semi IP Systems, SiFive, Silicon Creations, Silvaco, Sintegra, SmartFlow, Sofics, Sonics, Surecore, Synopsys, True Circuits, Uniquify
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Thursday, June 20th, 2013
Despite their marked contributions to DAC in Austin, the folks in the IP world have not been resting on their laurels, but have continued to generate developments of both a technical and business nature.
** Synopsys and OCZ Technology Group announced OCZ “achieved first-pass silicon success” in its newest NAND flash Vector SSD using Synopsys’ DesignWare DDR2/3-Lite PHY, Embedded Memories, STAR Memory System, and Professional Services.
The companies say the OCZ Vector SSD was designed “to deliver superior sustained performance through its new, high-performance Indilinx Barefoot 3 flash controller supporting the SATA-3 protocol. Synopsys’ design consultants worked closely with OCZ’s engineers throughout the implementation of their chip, delivering expertise and advanced methodologies in IP integration, physical design, and physical verification that enabled OCZ to complete their implementation in less than six months.”
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Tags: Andes Technology, Arasan, ARM, BDA, Beyond Semiconductor, Cadence Design Systems, CAST, Cavium, eMemory Technology, Evatronix, GDA Technologies, Imagination Technologies, MIPS, Mixel, NVIDIA, OCZ Technology Group, Synopsys
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