Posts Tagged ‘DAC’
Thursday, December 21st, 2017
San Francisco-based Methodics has been addressing both the enterprise data management and IP reuse/lifecycle management markets for over 10 years.
The company’s strategy of integrating their lifecycle management tools with products like Perforce version control software and Subversion from Apache, means they dovetail with industry standard solutions. As a natural outgrowth from that, Methodics’ IP-related offerings also work at the enterprise level, helping the customer’s distributed team coordinate and catalog IP use, and keeping track of third-party IP use as well.
In my recent phone call with Methodics CEO Simon Butler, it was clear the company is seeing the fruits of their many years of hard labor come to fruition.
(more…)
Tags: Apache, Cadence, DAC, ESD Alliance, Mentor Graphics, Methodics, Perforce, Simon Butler
No Comments »
Thursday, December 7th, 2017
This week on Thursday, December 14th, the second annual edition of REUSE 2017 will unfold in Silicon Valley. It’s a gathering crafted specifically for the vendors of IP blocks, and now whole sub-systems, those pieces of the puzzle which allow the vendors’ customers to design and produce electronic products more efficiently and with better results.
It goes without saying that IP is a pivotal part of the semiconductor supply chain today. Organizations like Arm and Synopsys reap huge benefits from being among the principal suppliers of that IP. But there are hundreds of IP companies in the world – big, medium, and small – that also provide IP.
Potentially, they could all be participating in something like Reuse 2017. Arm, for instance, is participating in the conference, along with dozens of smaller companies. Synopsys, however, is not.
(more…)
Tags: Achronix, Aldec, Andes Technology, Aphion, Archband, ARM, Avery Design Systems, CAST, Certus Semiconductor, ChipEstimate.com, City Semiconductor, Corigine, DAC, eFabless, FlexLogix, Intel, Intrinsic ID, IP-SoC, Menta, Mixel, Mobile Semiconductor, Mobiveil, Moortec, NSCore, NVM Engines, OmniDesign, Open-Silicon, QuickLogic, Reuse 2017, RISC-V, Samsung, Semi IP Systems, SiFive, Silicon Creations, Silvaco, Sintegra, SmartFlow, Sofics, Sonics, Surecore, Synopsys, True Circuits, Uniquify
No Comments »
Thursday, October 26th, 2017
When Cliosoft Founder and CEO Srinath Anantharaman and I spoke recently, it was an energetic conversation. Not surprising, given that the company has 250+ customers worldwide, and exhibits at conferences around the globe.
Adding to the momentum for Cliosoft: In May, the company announced designHUB: “A collaborative IP reuse ecosystem that enables companies to efficiently reuse all types of IP, including semiconductor IP, scripts, PDKs, documents, methodologies, etc. within the company, along with the user experience.”
Anantharaman is clearly enthused about the possibilities designHUB presents for the company’s customers, and is equally enthused about Cliosoft itself.
(more…)
Tags: CDNLive, Cliosoft, DAC, Design Reuse, designHUB, IP Reuse Ecosystem, Srinath Anantharaman
No Comments »
Thursday, January 5th, 2017
One of your New Year’s Resolutions should be to further understand the philosophy, technology, and implications of the RISC-V movement. And there will be no better way to follow through on that resolution than to attend the upcoming ESD Alliance discussion on the topic.
In a nod to the best in situational irony, the Alliance is hosting an evening event in Silicon Valley on January 18th specifically to discuss this open source processor architecture, which per some has the potential to turn ARM’s market dominance on its ear.
(more…)
Tags: ARM, BSD License, DAC, Dave Patterson, ESC Boston, ESD Alliance, Google, IoT Meetup, Jim Hogan, Krste Asanovic, MIT, Oracle, Rick O'Connor, RISC-V, RISC-V Foundation, SiFive, U.C. Berkeley, Yunsup Lee
No Comments »
Saturday, July 23rd, 2016
The semiconductor IP industry is reeling at news of the tragic death of Mark Templeton while white water kayaking last weekend in Oregon. Well known, widely admired, and held in great esteem for both his intelligence and unassuming style, Templeton will be sorely missed, not just in the IP industry, but across the entire tech sector.
Per the Press Release: “Mark R. Templeton, 57, was a highly respected venture capitalist in Silicon Valley who used his background as an engineer to foster scientific advancement. In his capacity as a director and board member of numerous tech companies and organizations, he was instrumental in driving growth in the intellectual property market through a combination of technical and business innovation.”
(more…)
Tags: Ablesky, Adaptive Sound Technologies, ARM, Artisan Components, DAC, DXCorr Design, Fabbrix, Jerry Ardizzone, Liam Goudge, Lucio Lanza, Mark Templeton, Neal Carney, Si2, Silicon Compiler Systems, Takumi
No Comments »
Thursday, July 14th, 2016
Long-time EDA investor Lucio Lanza lead a fascinating, albeit mystifying, discussion in the DAC Pavilion on Monday, July 6th, in Austin. His panelists included IPextreme’s Warren Savage, Scientific Ventures’ Mark Templeton, and eFabless’ Michael Wishart, with the topic under discussion being open source.
The session was titled “Daring to Move to Open Source” and was described thusly: “The emerging Internet of Things market is destined to upend that time-tested ‘advanced-node’ model, as developers opt for older, less costly process technologies, using commodity design tools and selecting proven IP blocks to quickly and efficiently assemble chips. As demand for IoT devices grows exponentially, might open source EDA tools and IP become viable, or even the winning combination that enables the low-cost design of an IoT SoC?”
Here are some soundbites from the panelists.
(more…)
Tags: DAC, Dare to Move to Open Source, eFabless, IPextreme, Lucio Lanza, Mark Templeton, Michael Wishart, Open Source, Scientific Ventures, Silvaco, Warren Savage
1 Comment »
Thursday, August 23rd, 2012
Behind Warren Savage’s calm and courteous demeanor beats the heart of a revolutionary: A guy who not only talks the talk, but walks the walk of growing his beloved IP industry through the most radical of ideas – cooperation.
 Warren is the founder and CEO of IPextreme, a Silicon-Valley based company helping other companies commercialize their IP, small nuggets of pure gold that would otherwise enjoy only internal use. With the assist of Warren & Co, that gold is beefed up, intensely documented, and then licensed to users outside the firewall who then have access to robust 3rd-party design blocks, yielding revenue back to the IP developers they would not otherwise enjoy.
So that’s Warren’s business, but what’s really impressive about Warren is the other half of his professional involvement: working through the GSA [Global Semiconductor Alliance] to enhance the well-being of all players in the IP industry, not just his customers. Warren chairs GSA’s Working Group on IP, and leads the Leadership Group subset within that Working Group.
Warren also founded and continues to lead Constellations, a consortium-like group of IP vendors who meet regularly to discuss business issues, develop joint solutions, and host invitation-only events for their customers. The next Constellations event is coming up in early October.
Clearly, Warren Savage is a revolutionary, someone who believes a rising tide raises all boats in the IP industry and acts vigorously on that belief. Warren and I spoke by phone on August 22nd.
(more…)
Tags: 3rd-party IP, ARM, ColdFire, Compact JTAG, Constellations, DAC, EDAC, Freescale, Global Semiconductor Alliance, GSA, GSA IP Working Group, Infineon, Intel, IPextreme, MIPS, PowerPC, Reuse Methodology Manual, Silicon IP, Synopsys, VSIA, Warren Savage
1 Comment »
|
