Posts Tagged ‘Tensilica’
Thursday, June 15th, 2017
UltraSoC is on a roll, having just wrapped up an energetic participation in the last month’s RISC-V conference in Shanghai, where UltraSoC CTO Gadge Panesar was a speaker. Additionally, the company is announcing “new funding, new investors, and new board members” – including UC Berkeley’s Alberto Sangiovanni-Vincentelli.
When I spoke this week with company CEO Rupert Baines, he started with Shanghai: “There is so much interest in RISC-V in China. The attendance there [exceeded] the headcount at the previous meetings at Google and MIT, although the numbers may be confusing as there were so many students at the Shanghai event.”
Asked if the RISC-V event would be in China again, Baines said, “I believe going forward there will be one conference in the U.S. each year, probably in Silicon Valley, and one international. Nvidia sponsored the latest one through their presence in Shanghai.”
Turning to UltraSoC, I asked about the company’s origin, market and competition.
Baines said, “We do semiconductor IP that solves a problem. The chips are so big and complicated today, understanding how they work – with lots of processors and lots of software interacting with each other and the real world – is incredibly difficult.
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Tags: Alberto Sangiovanni-Vincentelli, ARM, ARM TechCon, CEVA, Design Automation Conference 2017, Gadge Panesar, HiSilicon, Imagination, Microsemi, MIPS, Movidius, RISC-V, Rupert Baines, Tensilica, UltraSoC
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Thursday, April 24th, 2014
This week, Cadence announced its intention to acquire Jasper Design Automation. The news precipitated a tsunami of commentary, some of which is included in this blog: Atrenta’s Piyush Sancheti deems the move to be a good one; Cadence’s Craig Cochran and Michal Siwinski second the motion; and Elmer, whose clairvoyance regarding a Jasper acquisition was criticized by Oz Levia last fall, asks if the Cadence move is more a matter of window dressing. Finally, I offer a brief prediction regarding one possible long-term effect of this M&A.
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Tags: Apache, ARM, Atrenta, Cadence Design Systems, Charlie Huang, ChipVision, Craig Cochran, Daisy Systems, Denali, EDAC, GE, Kathryn Kranen, Mentor Graphics, Michal Siwinski, Piyush Sancheti, Quickturn, Real Intent, Sente, Sequence, Synopsys, Tensilica, Valid Logic, Verisity
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Thursday, February 27th, 2014
It makes it worthwhile to show up for work on days when you get to have a conversation with people like the folks of Sonics, a System IP vendor based in Silicon Valley. Articulate and knowledgeable, they have a nuanced understanding of how the IP business works, its challenges and opportunities.
When I spoke to them last week about my ongoing project to assemble IP for the chip in my Dick Tracy keychain, President & CEO Grant Pierce and VP of Operations Raymond Brinks were both on the call. We started by talking about how IP is priced.
Per Pierce: “The conditions under which various customers buy and use IP can be quite different. We have some customers who are fairly sophisticated. We sell [such customers] licensed IP, offer some initial training, and then off they go. After that, apart from an occasional email, we have little contact with them. There are customers, however, who are opposite in the extreme.
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Tags: AMBA, ARM, Cadence, Drew Wingard, Grant Pierce, IP, Nokia, OCP-IP, PIF, Raymond Brinks, Sonics, Synopsys, Tensilica, TI
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Thursday, October 17th, 2013
A brief sampler of recent announcements on the IP front reveal distinct themes in the marketplace. IP development and integration require a viable ecosystem of suppliers and tool vendors; automotive, audio and mobile apps continue to be important targets for IP developers whose customers seek better safety, longer battery life, and truer sound (particularly for sporting events and concerts of aging rockers); IP interfaces remain crucial; and platform-based design totally depends on further enhancements in IP technologies.
Additionally, acquisitions definitely pan out for the companies smart enough to snap up the good ones: Synopsys/ARC, Cadence/Tensilica, and Imagination/MIPS.
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Tags: Altera, ARC, ARM, ASSET InterTech, Cadence, CAST, Dolby, Freescale Semiconductor, Geir Skaaden, Geoff Lees, Imagination Technologies, IPextreme, Jack Guedj, John Couling, John Koeter, Martin Lund, Mentor Graphics, MIPS, Nikos Zervas, Pete Hutton, Suk Lee, Synopsys, Tensilica, Tom Halfhill, Tony King-Smith, TSMC, Warren Savage, Xilinx
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Thursday, August 1st, 2013
Bill Martin, President/VP of Engineering at E-System Design, has sent another thoughtful response to a blog regarding IP, in particular my post last week about the astonishing increase in the valuation of ARMH over the last 5 years.
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Years ago, Chris Rowen had a clear vision where EDA and IP would start to merge, given the complexities of both. He knew both could have a large impact on the resources and risks associated with creating an SoC. His vision was so compelling, Chris resigned from a great group within Synopsys to form his start-up, Tensilica.
At the time, EDA/IP/Customization were all difficult problems to resolve. By building larger blocks that automatically reconfigured and combined other aspects (examples: SW compiler/debugger for code that could add/delete instructions and a verification suite that reconfigured themselves based customers’ usage), the solution Chris created at Tensilica addressed SIP/Embedded SW/VIP and EDA.
Quite an ambitious undertaking, but over time as his solution was honed and matured, the industry saw the end result – a few months ago the large acquisition of Tensilica by Cadence. In fact, the deal was part of a trend. Look at the various EDA and IP acquisitions since 2008, those exceeding $100 million:
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Tags: Ansoft, Apache, ARM, Bill Martin, Cadence, Chris Rowen, Denali, E-System Design, IPextreme, Magma, Synopsys, Synplicity, Tensilica, VirageLogic
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Thursday, April 4th, 2013
Despite grumbling to the contrary, even some that I myself put forth in a blog earlier this year, there will indeed be a daily dose of IP information doled out at DAC in Austin in June. If you’re interested in IP, DAC 2013 actually promises to be quite informative. You can arrange your schedule so as to attend a single significant session each day devoted to various aspects of IP with all of its promise and particulars.
Here’s your DAC planning guide …
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Tags: Arteris, Atrenta, Chris Rowen, DAC 2013, Dan Kochpatcharin, David Murray, Duolog Technologies, Frank Ferro, Freescale, Hans Bouwmeester, IPextreme, John Eaton, John Swanson, Jose Nunez, Kamlesh Kumar Pathak, Keith Odom, Laurent Moll, Magillem Design Services, McKenzie Mortensen, Michael Cizi, Mike Gianfagna, Nagendra Gulur, National Instruments, Open-Silicon, Ouabache Designworks, Sonics, Southwest Reuse, STMicro, Sylvain Duvilliard, Synopsys, Tensilica, TI, TSMC, Vasant Kumar Easwaran, Warren Savage
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Tuesday, March 12th, 2013
As the trading day in New York draws to a close, it would appear that some analysts are correct; the market’s not too pleased about yesterday’s announcement that Cadence is acquiring Tensilica. Shares of CDNS are trading down well over 3% today. But you know, the market’s stupid. They understand zip zero nada about EDA or IP, and really why should they?
After all, EDA and IP providers make the black magic that they do look so easy. And, they’re constantly telling people that what they do isn’t rocket science. But it is! The EDA vendors make the tools that IP vendors use to create their products, and designers use to integrate said IP into the larger designs. It’s called an eco-system and it is rocket science.
It’s also on the level of brain surgery, quantum physics, and a bunch of other esoteric science and engineering disciplines that require a lot of education and and a lot of OJT, and even then is really hard to do. How many traders on Wall Street, or the analysts who track it all, really understand what EDA and/or IP are all about? Exactly!
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Tags: ARM, Cadence, CDNS, Chris Rowen, EDAC CEO Panel, Lip-Bu Tan, Simon Segars, Synopsys, Tensilica
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Tuesday, September 18th, 2012
Chris Rowen is Founder and CTO of Tensilica, an IP company based in Silicon Valley. We spoke last week by phone to discuss how an IP company decides what and when to introduce new products.
I first asked to Chris for a brief history of the RISC [Reduced Instruction Set Computing] architecture he is closely associated with, and how that history segued into the founding of Tensilica.
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From RISC to Tensilica …
Q: Can you give me a quick overview of the origins of RISC architecture?
 Chris Rowen: RISC is a set of ideas that grew up in academia and IBM in response to increased architectures in both the mainframe and microprocessor worlds.
People saw machines with really high hardware costs being built for assembly [language applications]. However, as compiler technology got better, people said: If I want a compiler to run well, I don’t need fancy instructions. I only need a common set of instructions that run really fast. All other complex operations could be composed by the compiler out of these fast, simple operations.
RISC grew out of these compiler technology advances, and a recognition in the VLSI era that there was an opportunity to rethink the process of how the architecture could be put together. (more…)
Tags: ARM, Chris Rowen, Dave Patterson, IBM, John Cocke, John Hennessy, MIPS Computer Systems, RISC, Silicon Graphics, Stanford, Synopsys, Tensilica, U.C. Berkeley
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Thursday, August 30th, 2012
Hal Barbour is President of CAST, an IP company based on the East Coast. Hal has a tremendous ability to explain the many facets of the industry, and it was a great pleasure to sit down and talk with him this week. When we spoke by phone on August 29th, he had just wrapped up an earlier call with a customer.
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Hal Barbour on All things IP …
Q: How do you make yourself known to customers?
 Hal Barbour: We have always put a lot of information in the hands of our customers, but the delivery mechanism today is quite a bit different. We’ve learned to leverage most of the contemporary tools – blogs, online meetings, webinars, shows and press releases. Press releases are just as important as ever, but where we used to send them to a central distribution center and a group of editors, now there are about 15 or 20 various people and outlets who disseminate the information to a much larger population.
Q: And how do working engineers hear about the products?
Hal Barbour: That’s the really interesting thing. Engineers today can easily see press releases directly, plus they have at their disposal a powerful set of search tools to help them get the information they need, so whatever information you’re putting out there, it better be right and it better be credible. If it’s not, engineers have got plenty of other sources to turn to.
And if you’re going to be out there, you better be able to respond to inquiries quickly and rapidly. Ultimately, however, it’s your name and your reputation that sells products. I can’t tell you the number of people who contact us based on our name and reputation.
Q: Isn’t that called ‘word of mouth’?
Hal Barbour: That’s exactly what it is, only it’s even faster today. Spreading the word used to be limited by who you knew, but today with social media and blogs, word of mouth moves at lighting speed and is more important than ever. Even today, though, nothing substitutes for face-to-face contact with the customer.
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Tags: 8051, Alma Technologies, ARM, BA22, Beyond Semiconductor, Cadence, CAST, Constellations, Denali, Evatronix, Fraunhofer, GSA IP Working Group, Hal Barbour, IPextreme, MIPS, Synopsys, Tensilica
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