Posts Tagged ‘IBM’
Thursday, June 9th, 2016
When SRC’s Bill Joyner took the podium this past Sunday evening at the 53rd DAC in Austin, he did something that’s never been done before: Present a panel about careers that wasn’t part of a Workshop for Women in EDA.
Up until 7 o’clock on June 5, 2016, a conversation about career perspectives was such a non-technical topic, it could only be found in Marie Pistilli’s beloved workshop, a venue where work/life balance, Academia vs. Industry, and how to promote your brand within the organization were thoroughly discussed every year for 15 years at DAC.
Now IEEE’s Council on EDA, CEDA, has made the bold decision to pick up where Marie’s workshop left off, sponsoring this week’s event and broadening the audience and the appeal.
Joyner had four people on his panel, a generous two hours to hash out various universal questions, and enough of a sense of humor to offer to wear the necktie he’d brought with him to add gravitas, or not to wear the tie to appear hipster and cool. He quickly decided to go without the tie, and the ensuing conversation went something like this.
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Tags: ARM, Bei Yu, Bill Joyner, Cadence, CEDA, Chinese University of Hong Kong, IBM, ICCAD, IEEE Council on Electronic Design Automation, Mentor Graphics, Pranavi Chandupatla, Reveal Design Automation, Semiconductor Research Corp., SRC, Zaher Andraus, Zhuo Li
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Wednesday, July 15th, 2015
Here’s the thing: Yeah, yeah it’s cool that IBM – which apparently invented or first implemented everything [see Below] – has announced 7-nanometer transistors that actually work. Yeah, that’s pretty teeny tiny and everybody’s thrilled. Of course.
Everybody at IBM, GlobalFoundaries, and Samsung (the triumvirate formerly known as Common Platform). Luminaries at Stanford, SUNY, and the Albany NanoTech Complex. Even the Good Governor of the Great Empire State himself.
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Tags: Andrew Cuomo, Cold Fusion, IBM, Moore's Law, SiGe
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Thursday, November 1st, 2012
You didn’t have to crank up Queen to hear the refrain in the background when ARM CEO Warren East stepped on stage in Silicon Valley this morning to deliver his keynote at the 2012 edition of ARM TechCon. No matter how you slice the pie, ARM is the champion of the world. They know it, they know that you and I know it, and we know that they know that we know it.
Yet despite all that knowing, the guys from ARM seem like a pretty likable bunch. A month ago, I heard ARM CTO Mike Muller give the keynote at the Sophia Antipolis Microelectronics Forum, where he left the same impression with his audience on the Cote d’Azure that Warren East left with his audience this morning in the heart of Silicon Valley: ARM puts cooperation above competition, partnering above posturing, and the well-being of the world above the well-being of the bottom line of ARM or the pocketbook any of its employees.
ARM may be the champion of the world, but it’s for a reason. They’re very good at what they do, they’ve had the luck and foresight to be in the right place at the right time over the last 2 decades, and they are as concerned as the rest of us about the plethora [read “billions”] of digital devices descending on the world which threaten to drive us all to the brink of destruction by way of global warming, polluted environs, or both.
Okay, that’s my qualitative take on this morning’s keynote. Following is a more quantitative version.
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Tags: A50 processor series, ARM, ARM TechCon, Freescale, George Gray, IBM, Internet of Things, Judson Althoff, Linaro, Linus Torvalds, Mike Muller, Oracle, Queen, Samsung, ST-Ericsson, TI, Warren East
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Tuesday, September 18th, 2012
Chris Rowen is Founder and CTO of Tensilica, an IP company based in Silicon Valley. We spoke last week by phone to discuss how an IP company decides what and when to introduce new products.
I first asked to Chris for a brief history of the RISC [Reduced Instruction Set Computing] architecture he is closely associated with, and how that history segued into the founding of Tensilica.
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From RISC to Tensilica …
Q: Can you give me a quick overview of the origins of RISC architecture?
 Chris Rowen: RISC is a set of ideas that grew up in academia and IBM in response to increased architectures in both the mainframe and microprocessor worlds.
People saw machines with really high hardware costs being built for assembly [language applications]. However, as compiler technology got better, people said: If I want a compiler to run well, I don’t need fancy instructions. I only need a common set of instructions that run really fast. All other complex operations could be composed by the compiler out of these fast, simple operations.
RISC grew out of these compiler technology advances, and a recognition in the VLSI era that there was an opportunity to rethink the process of how the architecture could be put together. (more…)
Tags: ARM, Chris Rowen, Dave Patterson, IBM, John Cocke, John Hennessy, MIPS Computer Systems, RISC, Silicon Graphics, Stanford, Synopsys, Tensilica, U.C. Berkeley
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