Posts Tagged ‘John Koeter’
Thursday, April 16th, 2015
Building on last year’s success, the 2015 Design Automation Conference in San Francisco is offering even more substantial content in the track centered on silicon IP and design reuse. Reading through the list of topics, speakers, and companies set to be featured across a diverse set of sessions from June 7-9 at Moscone Center, two things are obvious.
One, a lot of work has been done to assemble all of this. And two, it’s possible the thorny issues surrounding IP reuse may never go away: integration, verifying quality, convincing staff to use design blocks that originate outside of the group, and dealing with the massive amounts of data that IP selection and reuse generates.
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Tags: Aditya Mukherjee, Ann Mutschler, Bernie Delay, Bob Doud, Brenda Westcott, Brian Bailey, Clark Chen, Darren Jones, Dave Bursky, Drew Wingard, Ed Sperling, Farzad Zarrinfar, Frank Schirrmeister, Heather Monigan, John Blyler, John Koeter, Krishna Yarlagadda, Leah Schuth, Lewis Chu, Luis Paris, Martin Lund, Navraj Nandra, Raik Brinkmann, Saurabh Kumar, Shankar Krishnamoorthy, Suk Lee, Surya Hotah, Thomas Wong, Tom Anderson, Toshio Nakama, Warren Savage
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Wednesday, April 1st, 2015
Early Monday morning, Synopsys announced several new bits have been added to their impressive bucket of IP blocks, a new family of DesignWare processors targeted at vision applications. With an honorable pedigree – descent from the ARC technology that came to Synopsys via the 2010 acquisition of Virage Logic – the processors announced on March 30th are designed to be embedded in SoCs, specifically to meet a growing need to digitally “distinguish smiles from frowns, faces from cars, baby carriages from trees or dogs, and even sky from ground.”
These needs were articulated in a March 26th phone call with Synopsys Senior Manager of Product Marketing Mike Thompson, who enthusiastically explained, “The vision market will grow dramatically over the next several years. The next 10-to-15 years will be seen as a paradigm-shift period in how we interact with technology.”
That’s why he’s delighted Synopsys will surpass other players in driving that shift: “There are already a few vision processors available [on the market], and they are largely programmable. We took a slightly different approach, however, with the new DesignWare EV Processors we’ve developed.
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Tags: ARC, ARC MetaWare Development Toolkit, ARM, Convolutional Neural Network, DesignWare, DesignWare EV Processors, Google, John Koeter, Mike Thompson, NEST, OpenCV, OpenVX, Synopsys, Virage Logic
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Wednesday, June 4th, 2014
This week, in the early hours just prior to the opening of DAC, Synopsys announced a new initiative to reshape the world of IP. It’s called the IP Accelerated initiative, but it might as well as be called IP360. Just as Cadence’s EDA360 initiative was meant to reshape the design tool flow in the image of Cadence, Synopsys’ IP360 is meant to reshape the IP use and integration flow in the image of Synopsys.
And where EDA360 had three parts: System, SoC, and Silicon Realization, so IP360 has three parts: IP Prototyping, Architecting, and Integration. More specifically, the IP Accelerated initiative includes new IP prototyping kits with reference designs for IP preloaded into a HAPS-DX prototyping system, software development kits with processor subsystem reference designs and configurable models of DesignWare IP, and customized IP subsystems to augment Synopsys’ IP portfolio.
In other words, it’s all about “one-stop shopping,” per my September 30th conversation with Synopsys’ John Koeter, VP of Marketing for IP & Prototyping. “Synopsys has a broad portfolio of high-quality IP,” he said, and that combined with “our development kits for prototyping and software developmental” means that if you know how to reach Synopsys, you’re set and ready to go.
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Tags: Cadence, EDA360, IP Accelerated initiative, IP360, John Koeter, Synopsys
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Thursday, October 17th, 2013
A brief sampler of recent announcements on the IP front reveal distinct themes in the marketplace. IP development and integration require a viable ecosystem of suppliers and tool vendors; automotive, audio and mobile apps continue to be important targets for IP developers whose customers seek better safety, longer battery life, and truer sound (particularly for sporting events and concerts of aging rockers); IP interfaces remain crucial; and platform-based design totally depends on further enhancements in IP technologies.
Additionally, acquisitions definitely pan out for the companies smart enough to snap up the good ones: Synopsys/ARC, Cadence/Tensilica, and Imagination/MIPS.
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Tags: Altera, ARC, ARM, ASSET InterTech, Cadence, CAST, Dolby, Freescale Semiconductor, Geir Skaaden, Geoff Lees, Imagination Technologies, IPextreme, Jack Guedj, John Couling, John Koeter, Martin Lund, Mentor Graphics, MIPS, Nikos Zervas, Pete Hutton, Suk Lee, Synopsys, Tensilica, Tom Halfhill, Tony King-Smith, TSMC, Warren Savage, Xilinx
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