Posts Tagged ‘Design Automation Conference’
Thursday, November 30th, 2017
San Jose-based Sonics is a long-established IP vendor specializing in On-chip Networks [NoC] and Energy Processing Units [EPU]. Co-founded by CEO Grant Pierce and CTO Drew Wingard, the company has 150 parents and has “supported customer products that have shipped more than 4 billion SoCs.”
Currently Grant Pierce is an exceptionally busy man. Not only is he leading Sonics, he’s also serving as Chair of the ESD Alliance. It’s a fortunate circumstance to have Pierce leading the Alliance; his point of view is exactly what’s needed to help shape what was originally an EDA-focused organization into something that embraces the full set of constituencies driving electronic system design today. Pierce is strongly committed to new technologies and the small companies that drive the innovation.
Pierce and I spoke by phone in late November. He is clearly very enthused about the company and the ESD Alliance.
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Tags: Aart de Geus, ARM, Design Automation Conference, Drew Wingard, EPU, Gary Smith, Grant Pierce, IoT, Joe Costello, MIPS, Moortec, NoC, Reuse 2017, Robin Saxby, SoftBank, Sonics, Tallwood
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Thursday, October 19th, 2017
The Electronic System Design Alliance began life as the EDA Consortium over 25 years ago. Early last year, EDAC morphed into the ESD Alliance thanks to the efforts of many, not the least being ESD Alliance Executive Director Bob Smith, now in his third year serving in that role.
As currently I am mid-way through the process of speaking to the leadership of all of the member companies in the ESD Alliance, it was good to talk recently with Smith and discuss his vision for the future of the organization. His enthusiasm mirrors that of the many companies I have spoken with so far.
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Tags: ACM/SIGDA, Bob Smith, CELUG, Design Automation Conference, EDA Consortium, ESD Alliance, Flexera, Graham Bell, IEEE-CEDA, Jim Hogan, Julie Rogers, Larry Disenhof, License Management & Anti Piracy, Nanette Collins, Paul Cohen, San Jose State University, Sashi Subramanian, Sharon Hu, Stephanie Chou, Steve Pollock
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Wednesday, October 11th, 2017
After two years in Austin, the Design Automation Conference is returning to San Francisco for two good reasons: The City’s Moscone Convention Center has been thoroughly remodeled since DAC’s last visit in 2015 – enlarged, reworked, modernized – and the industries that fuel DAC – electronic design automation, system design, IP, and embedded systems – have a powerful and historic presence in Silicon Valley, a where place many in these disciplines work and live.
Hence June 2018 will witness a glamorous return to the Bay Area for DAC, and all its stakeholders, not the least being next year’s General Chair and Notre Dame CSE Professor, Dr. X. Sharon Hu.
In a recent phone call, Hu said it’s particularly exciting to be coming back to San Francisco, because the City is one of her favorite venues.
In preparation for DAC in 2018 and to similarly enhance anticipation for her Executive Committee – that group of hard-working volunteers who work the magic each year bringing DAC to fruition – Hu recently hosted a team building exercise here in 2017 in the just-reopened Moscone West portion of the massive complex. The group made sushi, and with pictures of the cook-off trending on Twitter, she laughed when I asked how it all went.
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Tags: ACM SIGDA, DAC 2018, DAC Under 40 Innovators, Design Automation Conference, DJI, Dr. X. Sharon Hu, Dr. Xin Li, Duke University, Hall-Erickson, IEEE, Michelle Clancy, Notre Dame, NVIDIA, Patrick Groeneveld, Richard Newton Young Student Fellows, Xilinx
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Thursday, November 10th, 2016
Next Tuesday, November 15th, is the deadline for submitting research abstracts for the IP track at DAC 2017 in Austin in June. Paper manuscripts are due the following Tuesday. IP-themed session proposals are also due on that Tuesday, November 22nd, while Designer & IP Track proposals are due December 14th.
[NOTE: The December 14th date listed above is for invited Design Track & IP Track proposals. All other proposals for DAC 2017 Design Track & IP Track content can be submitted for review up until January 14, 2017. Thank you to DAC Press Chair Michelle Clancy for this important clarification.]
In other words, if you want to present within the IP Track at the 54th Design Automation Conference, you need to get going now.
The committee that will be overseeing review of these proposals is being headed up by Lattice Semiconductor’s Claude Moughanni – his group taking seriously their role in assembling an IP program that’s both informative and cutting edge.
Moughanni’s committee members include IPnest’s Eric Esteve, Synopsys’ Marc Greenberg, ARM’s Simon Rance, Freescale’s Henning Spruth, Mentor’s Farzad Zarrinfar, Intel’s Ty Garibay, Samsung’s Kelvin Low, Silvaco’s Warren Savage, and Cadence’s Karamveer Yadav – an impressive group who are indeed subject experts.
So, why should you go to all the effort to submit something for review by this group? Is there really any benefit in taking the time to participate at DAC, next year or ever?
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Tags: 54DAC, AdaptIP, ARM, ARM TechCon, Cadence, CDNLive, Claude Moughanni, Design Automation Conference, Eric Esteve, Farzad Zarrinfar, Henning Spruth, Karamveer Yadav, Kelvin Low, Mac McNamara, Marc Greenberg, Mentor, Simon Rance, SNUG, Synopsys, Ty Garibay, Warren Savage
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Thursday, May 26th, 2016
There are clearly a lot of collateral distractions at the Design Automation Conference: Networking. Social Hours. Parties. Chotzkies. But the real fun at DAC comes from carving time out to attend technical sessions. This is year in Austin, the offerings are particularly rich.
On Sunday, June 5th, my two favorites are: The Workshop on Design Automation for Cyber-Physical Systems, and The Workshop on Computing in Heterogeneous, Autonomous ‘N’ Goal-Oriented Environments. Both of these all-day events feature experts from academia and industry, most speaking for at least 30 minutes. The topics will be very technical and the schedules allow for detailed presentations. Of course, this doesn’t mean the other workshops on Sunday don’t have great merit, but the two I have identified look to be particularly rich opportunities for learning.
Sunday evening, for the first time, there will also be a 2-hour panel focused on Career Perspectives in EDA, a discussion sponsored by CEDA. Although many will be obliged to attend networking dinners on Sunday evening, or will still be busy setting up booths for Monday morning’s Exhibit Hall opening, attending this Career Panel seems an opportunity not to be missed, particularly as it will be moderated by the supremely knowledgeable Bill Joyner from SRC. Admittedly, this is not a technical session, but the implications for the industry are profound. [File under the heading: ‘Concern for an Aging Industry’]
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Tags: 3D IC, Accellera, Bill Joyner, CEDA, Cyber-Physical Systems, DAC 2016, Design Automation Conference, Edward McCluskey, emulation, Heterogeneous Systems, IoT, Jason Cong, John Sanguinetti, Luca Carloni, Mark Horowitz, Nano-Scale Era, Post Silicon Diagnosis, Power Management, Simulation, UVM
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Thursday, May 12th, 2016
IP will be well represented at DAC according to Adapt IP Michael “Mac” McNamara, and he should know. He’s helped build the IP Track at the show and is concerned that everyone understand the IP-related content in Austin this year will be deep and wide.
Mac and I spoke by phone recently. He’d read a blog a posted here in April expressing skepticism about IP coverage at DAC. Therein, I suggested the content set for Austin in June was inadequate, given the important role IP plays in chip design today.
A thoughtful McNamara wanted to respond to this critique; he wanted to evangelize for the quality of the content at DAC – particularly as he is Vice Chair of the conference this year and will be General Chair in 2017. [Cadence’s Chuck Alpert is General Chair here in 2016.]
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Tags: Adapt IP, Anne Cirkel, ARM, DAC 2016, Design Automation Conference, DesignCon, DVCon, ICCAD, IPextreme, Mentor Graphics, Michael McNamara, Synopsys, Warren Savage
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Thursday, April 14th, 2016
IP now dominates design automation, evidenced in no small measure by ARM’s seat at the head of the table for the ESD Alliance, ESDA being an important sponsor of the Design Automation Conference. Everyone seems to agree that IP reuse is the only way complex mega-systems of the 21st century can be designed, so not surprisingly the DAC program now reflects that reality. There are sessions every day categorized as being IP-related, but are those designations accurate?
I would argue that a lot of the content that’s sitting in the IP Track at DAC is really just about design, and not specifically about IP-based design. To prove that point, below is a complete listing of the sessions in the IP Track that’s set to air between June 6th and 9th at DAC in Austin. Those that are legitimately about IP are bolded, sessions that actually talk about using IP. Those not bolded are ‘just’ about design, or are merely high-level nattering about superficial issues associated with IP reuse.
Conclusion: the number of IP-related sessions are far fewer than one would hope. If IP is this important, why aren’t there more sessions that are really about IP? Is there a conspiracy here?
Fortunately, this next week I’m talking at length with Warren Savage. As CEO of IPextreme, his knowledge about the technology and business of IP is pretty encyclopedic. I will run my conspiracy theory past him: DAC wants you to believe they believe in IP, but in fact the conference is still more about design automation, not about using silicon IP to enhance the process. EDA vendors still rule the roost at DAC.
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Tags: ARM, Design Automation Conference, ESD Alliance
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Thursday, May 22nd, 2014
It’s just amazing that DAC has become so thoroughly a show about IP that there are two major parties happening in San Francisco in June that have IP in their name: HOT IP Party and Stars of IP Party.
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Tags: AdaptIP, ARM, Atrenta, Cadence, CAST, Certus, DAC 2014, Dassault Systemes, Denali, Design Automation Conference, HOT IP Party, IPextreme, Jim Hogan, Rambus, Semico, SFCASA, Sonics, Stars of IP Party, Synopsys, TrueCircuits, TSMC, Warren Savage
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Thursday, May 15th, 2014
Calypto Design Systems is having quite a year. First the company announced that 2013 was its highest revenue period ever; then they announced that new offices have been opened in Korea; and most recently, Calypto named long-time EDA exec Mark Milligan as Vice President of Marketing. Previously, Milligan served as VP of Marketing at CoWare and VirtualLogix, VP of Marketing for Functional Verification at Synopsys, and VP of Corporate Marketing at SpringSoft before it was acquired by Synopsys.
Given this level of activity, it was interesting to sit down recently and talk in person with Calypto CEO Sanjiv Kaul, an articulate and energetic spokesman for the company. We started with Cadence’s recent purchase of Forte Design Systems.
Kaul said, “Cadence bought Forte because high-level synthesis is going mainstream, and we think we are well positioned to take advantage of that. Integration between Catapult C [Calypto’s HLS synthesis tool, acquired from Mentor Graphics in 2011] and our Formal tool is what the market needs today.”
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Tags: Cadence, Calypto Design Systems, Catapult C, Design Automation Conference, Forte Design Systems, Gary Smith, High-level Synthesis, HLS, Japser Design Automation, Mark Milligan, Mentor Graphics, PowerPro, Sanjiv Raul, SLEC HLS, SLEC Pro
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Thursday, March 20th, 2014
Thanks to a lot of hard work and perseverance on the part of various thought leaders in the IP industry – folks like Mike McNamara, Warren Savage, McKenzie Mortensen, Clark Chen, Devin Persaud, Tiffany Sparks, Yervant Zorian, and Farzad Zarrinfar – at last, IP has become an anchor tenant at DAC.
A situation that’s been far too long in coming, given that these days there are approximately 30 companies in the EDA industry, but upwards of 500 in IP. The fact is, if DAC didn’t make itself available to showcase an industry with 10x more possible exhibitors than EDA, where’s the future of the conference anyway?
I had a chance to speak with ‘Mac’ McNamara on Tuesday of this week about the IP Initiative he’s heading up for DAC 2014. [The others on the list above are on the committee.] Mac’s a legend in the EDA community based on his expertise and leadership roles at Chronologic, SureFire, Verisity and Cadence, where he headed up the company’s C-to-Silicon Compiler and Virtual Systems Platform. Mac left Cadence in 2012, and has served since then as CEO of Adapt IP, an IP startup that boasts both John Sanguinetti and Lucio Lanza on its board.
During our conversation, Mac said that anyone planning on attending the Design Automation Conference this June in San Francisco will want to be there on Monday, June 2nd. That is, anyone who’s interested in the IP industry.
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Tags: Adapt IP, ARM, Cadence, Chronologic, Clark Chen, DAC 2014, Design Automation Conference, Devin Persaud, Farzad Zarrinfar, Global World Congress, Hot Chips, Houssein Yassaie, Imagination Technologies, IPextreme, John Sanguinetti, Lucio Lanza, McKenzie Mortensen, Mentor Graphics, Mike McNamara, SureFire, Synopsys, Tiffany Sparks, TSMC, Verisity, Warren Savage, Yervant Zorian
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