Posts Tagged ‘IEEE’
Wednesday, October 11th, 2017
After two years in Austin, the Design Automation Conference is returning to San Francisco for two good reasons: The City’s Moscone Convention Center has been thoroughly remodeled since DAC’s last visit in 2015 – enlarged, reworked, modernized – and the industries that fuel DAC – electronic design automation, system design, IP, and embedded systems – have a powerful and historic presence in Silicon Valley, a where place many in these disciplines work and live.
Hence June 2018 will witness a glamorous return to the Bay Area for DAC, and all its stakeholders, not the least being next year’s General Chair and Notre Dame CSE Professor, Dr. X. Sharon Hu.
In a recent phone call, Hu said it’s particularly exciting to be coming back to San Francisco, because the City is one of her favorite venues.
In preparation for DAC in 2018 and to similarly enhance anticipation for her Executive Committee – that group of hard-working volunteers who work the magic each year bringing DAC to fruition – Hu recently hosted a team building exercise here in 2017 in the just-reopened Moscone West portion of the massive complex. The group made sushi, and with pictures of the cook-off trending on Twitter, she laughed when I asked how it all went.
(more…)
Tags: ACM SIGDA, DAC 2018, DAC Under 40 Innovators, Design Automation Conference, DJI, Dr. X. Sharon Hu, Dr. Xin Li, Duke University, Hall-Erickson, IEEE, Michelle Clancy, Notre Dame, NVIDIA, Patrick Groeneveld, Richard Newton Young Student Fellows, Xilinx 1 Comment »
Thursday, October 5th, 2017
Hangzhou C-SKY Microsystems, a 32-bit CPU vendor, became a member of the ESD Alliance in 2016 and was described at the time as “the first IP company from China to join.”
Founded in 2001, C-Sky has “developed 7 types of embedded CPUs covering a wide range of embedded applications including smart devices in IoT, digital audio and video, information security, network and communications, industrial control and automotive electronics. It is the only embedded CPU volume provider in China with its own instruction set architecture, the Yun-on-Chip architecture developed in conjunction with Alibaba.”
C-Sky is a growing IP company serving an enormous market. I spoke recently by phone with Dr. Xiaoning Qi, CEO at C-Sky, who was in California attending meetings. No stranger to Silicon Valley, he previously served at Intel, Rambus, Synopsys, and Sun, after completing his Ph.D. under Prof. Robert Dutton at Stanford.
(more…)
Tags: Aart de Geus, Alibaba, ARM, Asia-Pacific Leadership Council, Bob Smith, C-Sky Microsystem Corp., Chenming Hu, Chi-Foon Chan, Chinese American Semiconductor Professional Association, ESD Alliance, GSA, IEEE, Intel, Mentor Graphics, Microsoft, NB-IoT, Rambus, Robert Dutton, SMIC, Stanford, Subhasish Mitra, Sun Microsystems, Synopsys, TSMC, Wally Rhines, Xiaoning Qi, ZTE 1 Comment »
Thursday, May 19th, 2016
It’s a poorly kept secret that Bob Smith was brought in as Executive Director of EDAC last year to shake things up, to breathe new life into the sails of a somewhat becalmed organization. Well, in the category of be careful what you ask for, here’s how things have gone so far:
New companies have joined the consortium, the newest member of the Board of Directors is not a CEO, a plethora of monthly panels have engaged the industry in thought-provoking discussions about innovation vis-à-vis commercial enterprise, a marketing deal has been struck with Semico, and the whole friggin’ organization has been re-branded as the ESD Alliance to reflect an intent to get more IP guys, more Embedded guys, and more Yet-to-be-identified guys into the alliance than just the traditional anchor tenants from EDA.
But none of this comes close to the potential impact of the latest disruptive idea that ESDA is proposing: The founding of a brand new working group that could very well redefine the whole semiconductor supply chain: The ESD Alliance System Scaling Working Group.
Astonishing.
(more…)
Tags: Accellera, Bob Smith, EDAC, ESD Alliance, GSA, Herb Reiter, IEEE, Sematech, Semi, Semico, Si2, System Scaling Working Group No Comments »
|