Archive for the ‘Uncategorized’ Category
Wednesday, June 4th, 2014
This week, in the early hours just prior to the opening of DAC, Synopsys announced a new initiative to reshape the world of IP. It’s called the IP Accelerated initiative, but it might as well as be called IP360. Just as Cadence’s EDA360 initiative was meant to reshape the design tool flow in the image of Cadence, Synopsys’ IP360 is meant to reshape the IP use and integration flow in the image of Synopsys.
And where EDA360 had three parts: System, SoC, and Silicon Realization, so IP360 has three parts: IP Prototyping, Architecting, and Integration. More specifically, the IP Accelerated initiative includes new IP prototyping kits with reference designs for IP preloaded into a HAPS-DX prototyping system, software development kits with processor subsystem reference designs and configurable models of DesignWare IP, and customized IP subsystems to augment Synopsys’ IP portfolio.
In other words, it’s all about “one-stop shopping,” per my September 30th conversation with Synopsys’ John Koeter, VP of Marketing for IP & Prototyping. “Synopsys has a broad portfolio of high-quality IP,” he said, and that combined with “our development kits for prototyping and software developmental” means that if you know how to reach Synopsys, you’re set and ready to go.
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Tags: Cadence, EDA360, IP Accelerated initiative, IP360, John Koeter, Synopsys
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Thursday, May 29th, 2014
Take a moment to meet Arrow Devices. Although they will be exhibiting at DAC next week in San Francisco, Arrow is based in Bangalore so the following interview was conducted via email. I’m speaking here with Aditya Mittal. Before establishing the company, Mittal was a Senior Design Engineer at Nvidia.
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Tags: Aditya Mittal, Arrow Devices, Verification IP
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Thursday, May 22nd, 2014
It’s just amazing that DAC has become so thoroughly a show about IP that there are two major parties happening in San Francisco in June that have IP in their name: HOT IP Party and Stars of IP Party.
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Tags: AdaptIP, ARM, Atrenta, Cadence, CAST, Certus, DAC 2014, Dassault Systemes, Denali, Design Automation Conference, HOT IP Party, IPextreme, Jim Hogan, Rambus, Semico, SFCASA, Sonics, Stars of IP Party, Synopsys, TrueCircuits, TSMC, Warren Savage
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Thursday, May 15th, 2014
Calypto Design Systems is having quite a year. First the company announced that 2013 was its highest revenue period ever; then they announced that new offices have been opened in Korea; and most recently, Calypto named long-time EDA exec Mark Milligan as Vice President of Marketing. Previously, Milligan served as VP of Marketing at CoWare and VirtualLogix, VP of Marketing for Functional Verification at Synopsys, and VP of Corporate Marketing at SpringSoft before it was acquired by Synopsys.
Given this level of activity, it was interesting to sit down recently and talk in person with Calypto CEO Sanjiv Kaul, an articulate and energetic spokesman for the company. We started with Cadence’s recent purchase of Forte Design Systems.
Kaul said, “Cadence bought Forte because high-level synthesis is going mainstream, and we think we are well positioned to take advantage of that. Integration between Catapult C [Calypto’s HLS synthesis tool, acquired from Mentor Graphics in 2011] and our Formal tool is what the market needs today.”
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Tags: Cadence, Calypto Design Systems, Catapult C, Design Automation Conference, Forte Design Systems, Gary Smith, High-level Synthesis, HLS, Japser Design Automation, Mark Milligan, Mentor Graphics, PowerPro, Sanjiv Raul, SLEC HLS, SLEC Pro
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Thursday, May 1st, 2014
Two things happened as a result of falling and breaking my right arm early on the morning of April 19th in Monterey: I instantly became a ‘Lefty’ for the first time in my life, and I missed Warren Savage’s presentation at EDPS later that day.
Warren is CEO and President of IPextreme, and I kid you not when I say that what he doesn’t know about the IP industry isn’t worth knowing. That’s why I wanted to hear Warren’s talk, and why I was very happy to talk to him this week about my Dick Tracy keychain project.
How do I learn to be a knowledgeable customer of the IP industry, I asked Warren, particularly when my hypothetical wearable is something I could really use right now: An SoC-based gadget, built with oodles of IP, to wear on my left wrist that’s got one small button to remotely unlock my car, one that will start my car, one that will open or close the garage door, one that will tell me if I’ve got enough milk in the fridge, one that will turn the heat up and down at home even if I’m not there, and prosaically, one that will show me the time.
Of course, now that I can’t use my right hand to push the buttons on the device strapped to my left wrist, I no longer want buttons. I want the thing to respond to voice commands – “Unlock.” “Ignition.” “Garage.” “Got milk?” “Set temp.” “Time?” – simple instructions that should only produce results when it’s my voice and nobody else’s.
Warren was extremely informative during our phone call. He understood I wasn’t looking for specific help with my design, but how to shop for the IP to go into my design. I started by telling him that my research into IP has so far included conversations with:
CAST – Hal Barbour, Nikos Zervas, and Paul Lindemann
Sonics – Grant Pierce, Raymond Brinks
Adapt IP – Mac McNamara
S3 – Dermot Barry, Darren Hobbs
To further clarify the information gleaned from these people, my questions for Warren were very succinct, as were his answers.
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Tags: Adapt IP, ARM, CAST, EDPS, Faraday, GSA, Imagination Technologies, IPextreme, S3 Group, Sonics, Synopses, Unichip, Warren Savage
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Thursday, April 24th, 2014
This week, Cadence announced its intention to acquire Jasper Design Automation. The news precipitated a tsunami of commentary, some of which is included in this blog: Atrenta’s Piyush Sancheti deems the move to be a good one; Cadence’s Craig Cochran and Michal Siwinski second the motion; and Elmer, whose clairvoyance regarding a Jasper acquisition was criticized by Oz Levia last fall, asks if the Cadence move is more a matter of window dressing. Finally, I offer a brief prediction regarding one possible long-term effect of this M&A.
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Tags: Apache, ARM, Atrenta, Cadence Design Systems, Charlie Huang, ChipVision, Craig Cochran, Daisy Systems, Denali, EDAC, GE, Kathryn Kranen, Mentor Graphics, Michal Siwinski, Piyush Sancheti, Quickturn, Real Intent, Sente, Sequence, Synopsys, Tensilica, Valid Logic, Verisity
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Thursday, April 10th, 2014
Several weeks ago, I had a chance to speak by phone with the folks of S3, a multinational IP vendor and engineering company headquartered in Dublin, Ireland. Darren Hobbs, Director of Product Strategy for the Silicon Business Unit, was on the call, as was Dermot Barry, Vice President of the Silicon Business Unit.
Our conversation centered on two topics: a new ADC just released by S3, and my hypothetical design project, the Dick Tracy keychain. It was morning in California when we spoke, but closing in on dinner time in Ireland. Hobbs and Barry were patient with my questions, nonetheless.
Per Hobbs, “We want to talk today about our latest product, a high-speed ADC and one of the most efficient [in the marketplace]. This announcement has produced a lot of headlines, but we want to drill into what it all really means. The specs we are using here is performance per milliwatt. We harp on that, because it’s really critical today. Typically, what’s said with a launch like this is that it [processes so many bits at a particular speed], but that doesn’t really indicate the performance of an ADC.
“What we’re doing here is putting our necks on the line by saying instead what our efficiency is – a very, very small ADC when manufactured at 40 nanometers, just .09 square millimeters, and only consuming 6 milliwatts of power. It’s efficient in the order of 31 femtojoules [10-15 joules], which means for handsets that use 802.11ac, you get very high energy efficiency.”
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Tags: ADC, ChipEstimate, Darren Hobbs, Dermot Barry, Design-and-Reuse, S3 Group, SAR ADC, SAR architecture, successive approximation register architecture
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Thursday, March 20th, 2014
Thanks to a lot of hard work and perseverance on the part of various thought leaders in the IP industry – folks like Mike McNamara, Warren Savage, McKenzie Mortensen, Clark Chen, Devin Persaud, Tiffany Sparks, Yervant Zorian, and Farzad Zarrinfar – at last, IP has become an anchor tenant at DAC.
A situation that’s been far too long in coming, given that these days there are approximately 30 companies in the EDA industry, but upwards of 500 in IP. The fact is, if DAC didn’t make itself available to showcase an industry with 10x more possible exhibitors than EDA, where’s the future of the conference anyway?
I had a chance to speak with ‘Mac’ McNamara on Tuesday of this week about the IP Initiative he’s heading up for DAC 2014. [The others on the list above are on the committee.] Mac’s a legend in the EDA community based on his expertise and leadership roles at Chronologic, SureFire, Verisity and Cadence, where he headed up the company’s C-to-Silicon Compiler and Virtual Systems Platform. Mac left Cadence in 2012, and has served since then as CEO of Adapt IP, an IP startup that boasts both John Sanguinetti and Lucio Lanza on its board.
During our conversation, Mac said that anyone planning on attending the Design Automation Conference this June in San Francisco will want to be there on Monday, June 2nd. That is, anyone who’s interested in the IP industry.
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Tags: Adapt IP, ARM, Cadence, Chronologic, Clark Chen, DAC 2014, Design Automation Conference, Devin Persaud, Farzad Zarrinfar, Global World Congress, Hot Chips, Houssein Yassaie, Imagination Technologies, IPextreme, John Sanguinetti, Lucio Lanza, McKenzie Mortensen, Mentor Graphics, Mike McNamara, SureFire, Synopsys, Tiffany Sparks, TSMC, Verisity, Warren Savage, Yervant Zorian
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Thursday, February 27th, 2014
It makes it worthwhile to show up for work on days when you get to have a conversation with people like the folks of Sonics, a System IP vendor based in Silicon Valley. Articulate and knowledgeable, they have a nuanced understanding of how the IP business works, its challenges and opportunities.
When I spoke to them last week about my ongoing project to assemble IP for the chip in my Dick Tracy keychain, President & CEO Grant Pierce and VP of Operations Raymond Brinks were both on the call. We started by talking about how IP is priced.
Per Pierce: “The conditions under which various customers buy and use IP can be quite different. We have some customers who are fairly sophisticated. We sell [such customers] licensed IP, offer some initial training, and then off they go. After that, apart from an occasional email, we have little contact with them. There are customers, however, who are opposite in the extreme.
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Tags: AMBA, ARM, Cadence, Drew Wingard, Grant Pierce, IP, Nokia, OCP-IP, PIF, Raymond Brinks, Sonics, Synopsys, Tensilica, TI
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Thursday, February 13th, 2014
At last month’s DesignCon in Santa Clara, I went looking for some IP advice to help in assembling the bits and pieces for my Dick Tracy key chain/wristband design project. I got no farther than the CAST booth, because those guys had answers to all of my questions.
After an hour-long conversation with CEO Hal Barbour, COO Nikos Zervas, and PR & Media Rep Paul Lindemann, I’m quite sure no IP company, small and large, could be better at partnering with a product team looking for IP selection guidance.
We first discussed the processor core; CAST sells an 8-bit family and a 32-bit. After listening to the features required in my product – keyless entry and ignition for the car, remote control of the garage door, monitoring the amounts of milk in the fridge, and telling the time – the CAST guys said an 8-bit core would provide sufficient horsepower for the sensing, calculation and control features I described, even in the face of the mixed-signal, ADC demands of the product.
They also noted that the 8051 is by far CAST’s most popular core and useful to people working on Internet-of-Things ideas, particularly if WiFi features are not needed. With WiFi, a 32-bit processor probably makes better sense.
I asked about a price point for the core I would use. From research I’ve been doing in anticipation of my Dick Tracy design, I know that prices for IP cores are usually as closely guarded as Edward Snowden’s forwarding address. Hal Barbour said that CAST has always been pretty open about that: “Depending on the configuration, our 8-bit core will cost you somewhere between $30, 000 and $50,000.”
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Tags: CAST, Hal Barbour, Nikos Zervas, Paul Lindemann
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