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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a contributing editor for EDACafe.Com

Austemper & Functional Safety: The Alchemy of Modifying Design

 
July 26th, 2017 by Peggy Aycinena


It’s good to know another EDA startup has emerged
, they’ve been in such short supply of late.

Austin-based Austemper Design Systems is an EDA startup focused on functional safety that had the good luck to find the Design Automation Conference in their own front yard this year – making it easy for the company to exhibit in Austin and showcase their newly announced suite of tools.

Speaking by phone in a recent call, Austemper Founder & CEO Sanjay Pillay said, “We offer four different tools in our suite, one that analyzes quantitative metrics, two for design automation that go in and add diagnostic conversions and can be used for a single block of IP or for the entire design, and a fourth tool that runs fault-injection analysis.”

Given that the company has only been underway since March 2015, I suggested that tool portfolio represents a lot of productivity over a short amount of time.

Pillay agreed: “Although we are young, we are already working with the largest semiconductor companies in the world, and in the process of negotiating licenses with others.

“DAC was a great place to announce our products. We had more than 30 meetings and demonstrations with potential customers and partners during DAC. It was also an opportunity for us to meet in person with people we have interacted with over e-mails and conference calls, to make that human connection.”

Read the rest of Austemper & Functional Safety: The Alchemy of Modifying Design

Concertal Systems SDA: Holy Grail, the Musical

 
July 20th, 2017 by Peggy Aycinena


Last year, Texas-based Concertal Systems came to DAC, but only as an observer
. This year, the 15-month-old startup actually exhibited at the conference and, per reports, gave a pitch-perfect debut of their newly announced offerings: A suite of web-based tools – Audition, Orchestrate, Rehearse – which the company says effectively solves many of the problems associated with SDA, system design automation.

Per Concertal Founder and CEO Bob Ledzius, the automation of modern system design is completely dependent on the ability to seek out, vet, and integrate IP. But that process has been stalled, until now.

“A lot of people have been promising these capabilities,” Ledzius said during our recent phone call, “but we’re actually delivering on the promise with our SDA methodology.

“A lot of people have been doing great stuff to solve the incremental problems around system design, but we started by asking the right questions, not just the incremental ones. We took a step back and said, if you want the ability to develop designs in minutes – not months – then you need to develop a system for high-level IP reuse.

“Starting from this point of view, we came up with specific conclusions and solved the problem of IP verification and integration.”

Read the rest of Concertal Systems SDA: Holy Grail, the Musical

ARM: A Gnawing Sense of Unease

 
July 12th, 2017 by Peggy Aycinena


It’s been a year since two cataclysmic news bits hit the wires
, the two stories not unrelated.

The UK decided to Brexit the EU on 23 June 2016, and ARM announced it had been sold to Tokyo-based SoftBank three weeks later, on 18 July 2016. For some, these developments would have been unthinkable up to the moment they unfolded, but now they’re both a reality.

Article 50 was triggered by the British PM on 29 March 2017, and the UK will no longer be in the EU as of March 2019.

ARM is no longer publicly traded, and although it was once the crown jewel of Britain’s technical portfolio, it is now a wholly owned Japanese enterprise. Or at least it was, until 7 March 2017 when SoftBank announced an even more astonishing bit of news.

Read the rest of ARM: A Gnawing Sense of Unease

SmartFlow: The Importance of Export Compliance

 
June 22nd, 2017 by Peggy Aycinena


Below is a contributed op-ed piece
from SmartFlow Compliance Solutions CEO Ted Miracco, and company AE Akshay Dhule.

I last spoke with Miracco in November 2015 when the company launched, offering tools and strategies to software companies who have lost product to theft and piracy. At the time, Synopsys was dealing with a publicly-acknowledged system breach, so that conversation with SmartFlow was particularly pertinent.

This current piece, however, is about export compliance, a topic also of intense interest to the EDA industry.

Cadence’s Larry Disenhof is the industry’s subject expert in this area. Having heard him speak numerous times, although the piece below ends with a plug for SmartFlow, Disenhoff would undoubtedly agree with an articulate reminder that export compliance is neither optional nor for the faint of heart.

The message is clear: If you’re running a software company, ignore these issues at your own peril.

Read the rest of SmartFlow: The Importance of Export Compliance

UltraSoC: Addressing their Customer’s Customer

 
June 15th, 2017 by Peggy Aycinena


UltraSoC is on a roll
, having just wrapped up an energetic participation in the last month’s RISC-V conference in Shanghai, where UltraSoC CTO Gadge Panesar was a speaker. Additionally, the company is announcing “new funding, new investors, and new board members” – including UC Berkeley’s Alberto Sangiovanni-Vincentelli.

When I spoke this week with company CEO Rupert Baines, he started with Shanghai: “There is so much interest in RISC-V in China. The attendance there [exceeded] the headcount at the previous meetings at Google and MIT, although the numbers may be confusing as there were so many students at the Shanghai event.”

Asked if the RISC-V event would be in China again, Baines said, “I believe going forward there will be one conference in the U.S. each year, probably in Silicon Valley, and one international. Nvidia sponsored the latest one through their presence in Shanghai.”

Turning to UltraSoC, I asked about the company’s origin, market and competition.

Baines said, “We do semiconductor IP that solves a problem. The chips are so big and complicated today, understanding how they work – with lots of processors and lots of software interacting with each other and the real world – is incredibly difficult.

Read the rest of UltraSoC: Addressing their Customer’s Customer

Aart de Geus: Grand Challenges in IP

 
June 8th, 2017 by Peggy Aycinena


This is fourth in a 4-part series on Grand Challenges in IP
. Previous dialogs featured Sonics CEO Grant Pierce, CAST-IP Board Chair Hal Barbour, and Silvaco IP Division GM Warren Savage. This final, lengthy conversation is with Synopsys co-CEO Aart de Geus, winner of the 2008 Phil Kaufman Award.

To say Aart de Geus is synonymous with Synopsys, an organization he’s led for over 30 years, is not an understatement. His entire professional zeitgeist is wrapped up in the company. Neither is it an understatement to say de Geus is always on-message, always on-point. The interview below is no exception.

Dr. de Geus’ vision of Grand Challenges in IP is informed by the daily, working realities of the needs of the customers that constitute the IP market, and an IP vendor’s evolving response to those needs. We spoke by phone on June 1st.
Read the rest of Aart de Geus: Grand Challenges in IP

Warren Savage: Grand Challenges in IP

 
June 1st, 2017 by Peggy Aycinena


This is the third in a four-part series showcasing Grand Challenges in IP
. The first two conversations were with Sonics CEO Grant Pierce, and CAST Board Chair Hal Barbour.

This week’s dialog is with Warren Savage, founder and CEO of IPextreme. The company was purchased by Silvaco in 2016, where Savage now serves as GM of the IP division.

Warren Savage has been an energetic leader in the IP community, working to get companies in the industry to link arms, address common concerns, and give greater visibility to the importance of their products in the global semiconductor supply chain.

When we spoke on May 24th, Savage began by addressing my question about protection for IP blocks as they move down the manufacturing chain

Read the rest of Warren Savage: Grand Challenges in IP

Hal Barbour: 8 Grand Challenges in IP

 
May 25th, 2017 by Peggy Aycinena


This conversation with Hal Barbour,
Chairman at CAST IP, is the second of four dialogs about Grand Challenges in IP.

The first installment in the series, published last week, was a conversation with Sonics co-Founder and CEO Grant Pierce.

Pierce argues that today’s Grand Challenges in IP center around the complexities of delivering sub-systems and related technical expertise to customers, helping develop edge-node devices targeted at Machine Learning, and providing IP for myriad automotive systems – all while meeting demands for greater bandwidth and throughput, and astonishingly low power.

In this week’s installment in the series, Hal Barbour talks about a completely different set of Grand Challenges in IP – those related to the business issues surrounding the industry.

Read the rest of Hal Barbour: 8 Grand Challenges in IP

Grant Pierce: Grand Challenges in IP

 
May 18th, 2017 by Peggy Aycinena


Here begins the first of four dialogs about Grand Challenges in IP
. This first installment is a conversation with Sonics co-Founder and CEO Grant Pierce, who also currently serves as Chair of the ESD Alliance. We spoke by phone earlier this week.

Asked to enumerate the Grand Challenges in IP he sees today, Pierce began: “Having been in the industry for 20 years myself, I am surprised that we still have some challenges ahead of us. We have new entrants into the industry that are more focused at the system level, however, with customers coming in to interact with the IP guys directly to get their custom designs done.

“What I am seeing today, versus 20 years ago, is the emergence of Machine Learning. And that brings with it some technical challenges. On the one hand, they are very familiar – the age-old challenges about bandwidth and throughput – but on the other hand, they are also very new. Today’s applications are driving things together in a totally new way.

Read the rest of Grant Pierce: Grand Challenges in IP

IP News: Bad outweighs the Good, and your point is?

 
May 4th, 2017 by Peggy Aycinena


It’s not been pretty of late in the world of IP
. Imagination’s valuation tanked when it was revealed in early April that the company might be losing Apple as a customer. Imagination says it’s going to fight this development, but a different ending to the story of David and Goliath comes to mind in that declaration.

Then this week, that same Imagination announced it was selling MIPS – a company it bought back in 2012 with great fanfare for [a mere] $60 million. [It’s true, MIPS’ patent portfolio was worth a lot more.]

Also this week, TSMC announced it is charging a former employee with IP theft: The former employee is alleged to have stolen manufacturing data from TSMC specifically related to Nvidia and AMD chip production, taken it across the Straights of Taiwan, and turned it over to his new employer in the PRC, HLMC.

Read the rest of IP News: Bad outweighs the Good, and your point is?




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