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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a contributing editor for EDACafe.Com

eSilicon: Jack Harding unplugged

 
June 19th, 2014 by Peggy Aycinena

Among the least likely events to take place at a conference as big and noisy as the Design Automation Conference is an intense, unplugged conversation with an industry leader, especially in the midst of the Exhibit Hall. Nonetheless, I had a chance to sit and talk with eSilicon co-founder and CEO Jack Harding for almost an hour in his company booth on Monday morning, June 2nd, at DAC in San Francisco.

In the background, outside the flimsy walls of the suite in which we were talking, one could hear the roar of the opening-hour crowd in the exhibit hall, mixed with the unmistakable sounds of Gary Smith revving up nearby for his annual Pavilion Panel in that blues band style he favors.

Prior to June 2nd, I hadn’t seen Jack Harding for 7 years. At that time, thanks to Brian Fuller’s eavesdropping on a private conversation, my disagreement with Jack about how tech leaders get their kids to study technology ended up in Brian’s blog for all the world to read. If Jack knew, he probably didn’t care – he’s always lived by his own rules – whereas I followed rules written by others, so I did care and hence approached this month’s appointment at DAC with marked trepidation. How unnecessary.

Harding never mentioned our disagreement in 2007. Instead I found him a great conversationalist, honest, self-effacing in a particular way, and interested in a wide range of issues. Naturally, I don’t regret Brian Fuller wasn’t hovering nearby to report out on the conversation, but I do regret Jack and I didn’t have an additional hour to chat in San Francisco. He began by reminding me that success in the tech sector can depend on a host of “exogenous variables.”

Read the rest of eSilicon: Jack Harding unplugged

SIP Entrepreneurs: Hal Barbour says opportunities abound

 
June 18th, 2014 by Peggy Aycinena

Monday at DAC 2014 in San Francisco was IP Day. Part of the day’s program included a panel featuring entrepreneurs pursuing the business of third-party IP: CAST’s Hal Barbour, Truechip Solutions’ Shishir Gupta, IPextreme’s Warren Savage, Methods2Business’ Marleen Boonen, and Recore Systems’ Dirk Logie.

After the panel, I had a chance to speak with Hal Barbour, CEO at CAST. I asked him if the received wisdom is correct – most innovation in silicon IP comes from small companies.

Hal said, “Traditionally, almost all innovation in the SIP business has come from small entrepreneurial companies. Large companies have gained their position through aggressive acquisitions, and not through internal development. Unless things change in unforeseen ways, it’s going to be difficult for the large companies to dramatically change this model.”

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IP360: SNPS takes page from CDNS playbook

 
June 4th, 2014 by Peggy Aycinena

This week, in the early hours just prior to the opening of DAC, Synopsys announced a new initiative to reshape the world of IP. It’s called the IP Accelerated initiative, but it might as well as be called IP360. Just as Cadence’s EDA360 initiative was meant to reshape the design tool flow in the image of Cadence, Synopsys’ IP360 is meant to reshape the IP use and integration flow in the image of Synopsys.

And where EDA360 had three parts: System, SoC, and Silicon Realization, so IP360 has three parts: IP Prototyping, Architecting, and Integration. More specifically, the IP Accelerated initiative includes new IP prototyping kits with reference designs for IP preloaded into a HAPS-DX prototyping system, software development kits with processor subsystem reference designs and configurable models of DesignWare IP, and customized IP subsystems to augment Synopsys’ IP portfolio.

In other words, it’s all about “one-stop shopping,” per my September 30th conversation with Synopsys’ John Koeter, VP of Marketing for IP & Prototyping. “Synopsys has a broad portfolio of high-quality IP,” he said, and that combined with “our development kits for prototyping and software developmental” means that if you know how to reach Synopsys, you’re set and ready to go.

Read the rest of IP360: SNPS takes page from CDNS playbook

Arrow Devices: VIP meet & greet

 
May 29th, 2014 by Peggy Aycinena

Take a moment to meet Arrow Devices. Although they will be exhibiting at DAC next week in San Francisco, Arrow is based in Bangalore so the following interview was conducted via email. I’m speaking here with Aditya Mittal. Before establishing the company, Mittal was a Senior Design Engineer at Nvidia.

Read the rest of Arrow Devices: VIP meet & greet

IP @ DAC: Parties, Stuff & Bother

 
May 22nd, 2014 by Peggy Aycinena

It’s just amazing that DAC has become so thoroughly a show about IP that there are two major parties happening in San Francisco in June that have IP in their name: HOT IP Party and Stars of IP Party.

Read the rest of IP @ DAC: Parties, Stuff & Bother

HLS Vision: Sanjiv Kaul’s betting his career on it

 
May 15th, 2014 by Peggy Aycinena

Calypto Design Systems is having quite a year. First the company announced that 2013 was its highest revenue period ever; then they announced that new offices have been opened in Korea; and most recently, Calypto named long-time EDA exec Mark Milligan as Vice President of Marketing. Previously, Milligan served as VP of Marketing at CoWare and VirtualLogix, VP of Marketing for Functional Verification at Synopsys, and VP of Corporate Marketing at SpringSoft before it was acquired by Synopsys.

Given this level of activity, it was interesting to sit down recently and talk in person with Calypto CEO Sanjiv Kaul, an articulate and energetic spokesman for the company. We started with Cadence’s recent purchase of Forte Design Systems.

Kaul said, “Cadence bought Forte because high-level synthesis is going mainstream, and we think we are well positioned to take advantage of that. Integration between Catapult C [Calypto’s HLS synthesis tool, acquired from Mentor Graphics in 2011] and our Formal tool is what the market needs today.”

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MyDesign: Final answers from IPextreme’s Warren Savage

 
May 1st, 2014 by Peggy Aycinena

Two things happened as a result of falling and breaking my right arm early on the morning of April 19th in Monterey: I instantly became a ‘Lefty’ for the first time in my life, and I missed Warren Savage’s presentation at EDPS later that day.

Warren is CEO and President of IPextreme, and I kid you not when I say that what he doesn’t know about the IP industry isn’t worth knowing. That’s why I wanted to hear Warren’s talk, and why I was very happy to talk to him this week about my Dick Tracy keychain project.

How do I learn to be a knowledgeable customer of the IP industry, I asked Warren, particularly when my hypothetical wearable is something I could really use right now: An SoC-based gadget, built with oodles of IP, to wear on my left wrist that’s got one small button to remotely unlock my car, one that will start my car, one that will open or close the garage door, one that will tell me if I’ve got enough milk in the fridge, one that will turn the heat up and down at home even if I’m not there, and prosaically, one that will show me the time.

Of course, now that I can’t use my right hand to push the buttons on the device strapped to my left wrist, I no longer want buttons. I want the thing to respond to voice commands – “Unlock.” “Ignition.” “Garage.” “Got milk?” “Set temp.” “Time?” – simple instructions that should only produce results when it’s my voice and nobody else’s.

Warren was extremely informative during our phone call. He understood I wasn’t looking for specific help with my design, but how to shop for the IP to go into my design. I started by telling him that my research into IP has so far included conversations with:

CASTHal Barbour, Nikos Zervas, and Paul Lindemann
SonicsGrant Pierce, Raymond Brinks
Adapt IPMac McNamara
S3Dermot Barry, Darren Hobbs

To further clarify the information gleaned from these people, my questions for Warren were very succinct, as were his answers.

Read the rest of MyDesign: Final answers from IPextreme’s Warren Savage

Jasper OpEd: Atrenta, Cadence, Elmer et al

 
April 24th, 2014 by Peggy Aycinena

This week, Cadence announced its intention to acquire Jasper Design Automation. The news precipitated a tsunami of commentary, some of which is included in this blog: Atrenta’s Piyush Sancheti deems the move to be a good one; Cadence’s Craig Cochran and Michal Siwinski second the motion; and Elmer, whose clairvoyance regarding a Jasper acquisition was criticized by Oz Levia last fall, asks if the Cadence move is more a matter of window dressing. Finally, I offer a brief prediction regarding one possible long-term effect of this M&A.

Read the rest of Jasper OpEd: Atrenta, Cadence, Elmer et al

S3 Tutorial: SAR ADC, Node2Node, IP Integration, Analog with a ‘ue’

 
April 10th, 2014 by Peggy Aycinena

Several weeks ago, I had a chance to speak by phone with the folks of S3, a multinational IP vendor and engineering company headquartered in Dublin, Ireland. Darren Hobbs, Director of Product Strategy for the Silicon Business Unit, was on the call, as was Dermot Barry, Vice President of the Silicon Business Unit.

Our conversation centered on two topics: a new ADC just released by S3, and my hypothetical design project, the Dick Tracy keychain. It was morning in California when we spoke, but closing in on dinner time in Ireland. Hobbs and Barry were patient with my questions, nonetheless.

Per Hobbs, “We want to talk today about our latest product, a high-speed ADC and one of the most efficient [in the marketplace]. This announcement has produced a lot of headlines, but we want to drill into what it all really means. The specs we are using here is performance per milliwatt. We harp on that, because it’s really critical today. Typically, what’s said with a launch like this is that it [processes so many bits at a particular speed], but that doesn’t really indicate the performance of an ADC.

“What we’re doing here is putting our necks on the line by saying instead what our efficiency is – a very, very small ADC when manufactured at 40 nanometers, just .09 square millimeters, and only consuming 6 milliwatts of power. It’s efficient in the order of 31 femtojoules [10-15 joules], which means for handsets that use 802.11ac, you get very high energy efficiency.”

Read the rest of S3 Tutorial: SAR ADC, Node2Node, IP Integration, Analog with a ‘ue’

Finally: IP now an Anchor Tenant at DAC!

 
March 20th, 2014 by Peggy Aycinena

Thanks to a lot of hard work and perseverance on the part of various thought leaders in the IP industry – folks like Mike McNamara, Warren Savage, McKenzie Mortensen, Clark Chen, Devin Persaud, Tiffany Sparks, Yervant Zorian, and Farzad Zarrinfar – at last, IP has become an anchor tenant at DAC.

A situation that’s been far too long in coming, given that these days there are approximately 30 companies in the EDA industry, but upwards of 500 in IP.  The fact is, if DAC didn’t make itself available to showcase an industry with 10x more possible exhibitors than EDA, where’s the future of the conference anyway?

I had a chance to speak with ‘Mac’ McNamara on Tuesday of this week about the IP Initiative he’s heading up for DAC 2014. [The others on the list above are on the committee.] Mac’s a legend in the EDA community based on his expertise and leadership roles at Chronologic, SureFire, Verisity and Cadence, where he headed up the company’s C-to-Silicon Compiler and Virtual Systems Platform. Mac left Cadence in 2012, and has served since then as CEO of Adapt IP, an IP startup that boasts both John Sanguinetti and Lucio Lanza on its board.

During our conversation, Mac said that anyone planning on attending the Design Automation Conference this June in San Francisco will want to be there on Monday, June 2nd. That is, anyone who’s interested in the IP industry.

Read the rest of Finally: IP now an Anchor Tenant at DAC!




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