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Thursday, May 15th, 2014
Tags: Cadence, Calypto Design Systems, Catapult C, Design Automation Conference, Forte Design Systems, Gary Smith, High-level Synthesis, HLS, Japser Design Automation, Mark Milligan, Mentor Graphics, PowerPro, Sanjiv Raul, SLEC HLS, SLEC Pro
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Thursday, May 1st, 2014
Tags: Adapt IP, ARM, CAST, EDPS, Faraday, GSA, Imagination Technologies, IPextreme, S3 Group, Sonics, Synopses, Unichip, Warren Savage
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Thursday, April 24th, 2014
Tags: Apache, ARM, Atrenta, Cadence Design Systems, Charlie Huang, ChipVision, Craig Cochran, Daisy Systems, Denali, EDAC, GE, Kathryn Kranen, Mentor Graphics, Michal Siwinski, Piyush Sancheti, Quickturn, Real Intent, Sente, Sequence, Synopsys, Tensilica, Valid Logic, Verisity
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Thursday, April 10th, 2014
Tags: ADC, ChipEstimate, Darren Hobbs, Dermot Barry, Design-and-Reuse, S3 Group, SAR ADC, SAR architecture, successive approximation register architecture
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Thursday, February 27th, 2014
Tags: AMBA, ARM, Cadence, Drew Wingard, Grant Pierce, IP, Nokia, OCP-IP, PIF, Raymond Brinks, Sonics, Synopsys, Tensilica, TI
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