Posts Tagged ‘Synopsys’
Wednesday, February 21st, 2024
In an impressive showcase of financial strength and market leadership, Synopsys, Inc. (Nasdaq: SNPS) today unveiled its financial achievements for the first quarter of the fiscal year 2024, setting new records and surpassing analysts’ expectations. The technology giant, renowned for its comprehensive silicon to systems design solutions, reported a staggering quarterly revenue of $1.649 billion, marking a significant 21% increase from the $1.361 billion recorded in the same period last year.
This year’s fiscal performance not only signifies robust growth but also includes the positive impact of an additional week in the first quarter, a strategic advantage that has contributed to the company’s outstanding results. Synopsys’ GAAP earnings per diluted share stood at $2.89, with non-GAAP earnings reaching an impressive $3.56 per diluted share, eclipsing the high end of the company’s own forecasts.
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Tags: Earnings, Synopsys
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Thursday, December 21st, 2017
Verific Design Automation in based in Alameda, not exactly Silicon Valley, but close enough to be within driving distance. The company has been in existence for almost 20 years and reports few competitors, if any. Instead, they see themselves as the de-facto standard for HDL language parsers, and as such can be found in just about every chip design flow.
In fact, according to Rick Carlson, Verific VP of Worldwide Sales, he’s more astonished with each passing day just how many places applications developed on top of Verific can be found. Not because he doubts the quality of the product, but because of the wide diversity of industries who are now developing chips.
Rick Carlson also knows a thing or two about building collegiality between the companies that constitute the EDA industry. He was one of the founders of the EDA Consortium 30 years ago, and the Phil Kaufman Award. We spoke at length last month.
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Tags: AI, Apple, Applicon, ARM, Atari, Averant, Cadence, Calma, Commodore, Computervision, Daisy Systems, Dave Millman, EDA Consortium, EDA Systems, EDAC, Escalade, ESD Alliance, Go, IEEE 1801, IIT Chicago, Intel, Invionics, Mentor, Microsoft, Northstar, NVIDIA, Phil Kaufman Award, Qualcomm, RISC-V, Samsung, Sinclair, Steve Jobs, Synopsys, Synplicity, UPF 3.0, Valid Logic, Verific
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Thursday, December 14th, 2017
The leading EDA recruitment guru, Mark Gilbert, regularly sends out info about job openings to his extensive contact list. In a recent such email, I took the time to read the job descriptions in detail and was amazed. These openings are so technical and so unique, I had to call Mark.
“These job requirements are so specific,” I said when he picked up, “surely there can’t be more than a few dozen people who fill the bill. How do you ever find them?”
Mark laughed: “You’re right. There are so few matches for these companies, given their job requirements and the correct combination of skills they’re looking for. For me to fill one position, I can look at several thousand resumes. And each resume is incredibly comprehensive.
“But I’m looking for the one guy that has this and that skill, but not the other. Yet there are very few people who have those qualifications.”
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Tags: Cadence, EDA, EDA-Careers, Mark Gilbert, Mentor Graphics, Synopsys
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Thursday, October 12th, 2017
DVCon Europe 2017 will be in Munich next week, a great destination for tourists and technologists alike. This is the fourth year the conference will occur in Europe, the original Silicon Valley based version now in its 27th year.
DVCon Europe General Chair Oliver Bell and I spoke this week by phone about the upcoming event; he was in Germany and I was in Northern California. I offered that Munich is a beautiful city, and he agreed.
“The conference will be in downtown Munich,” Bell said, “at the Holiday Inn. This is a really nice hotel, located near to Marienplaz, and easily reachable from public transportation.”
Bell then laughed and acknowledged that, as famous as the city’s Oktoberfest may be, it’s better that DVCon is being held several weeks after that particular annual exuberance has run its course. The city’s just that much more calm and enjoyable, he noted, after the hundreds of thousands of Oktoberfest revelers have returned to their normal pursuits.
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Tags: 2017 DVCon Europe, Accellera, ARM, Audi, Berthold Hellenthal, Bosch Sensortec, Cadence, Horst Symanzik, Infineon, Intel, Martin Barnasconi, Mentor Graphics, Munich, Nokia, Oliver Bell, Rohde & Schwarz, STMicro, Synopsys, SystemC Evolution Day, Technical University of Munich, UVM
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Thursday, September 28th, 2017
Vic Kulkarni is well-known in the EDA community as co-Founder, CEO and President of Sequence Design from 1995 until the company merged with Apache in 2009, which in turn was acquired by ANSYS in 2011. Kulkarni is now VP and Chief Strategist in the Office of CTO for the Semiconductor Business Unit at ANSYS.
There is little Kulkarni has not seen in his 30+ years in Silicon Valley. Although our conversation here mostly highlights current successes at ANSYS, it’s clear he continues to be wildly enthused about the broader promises of technology and the exciting efforts underway to create tools and strategies to bring those promises to fruition. Vik Kulkarni’s enthusiasm is the kind of thing that continues to make this industry so vibrant, and makes careers herein appealing for the next generation of engineers.
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Tags: Aart de Geus, Ansys, Apache, ARM, Bollywood, Cadence, DAC, ESD Alliance, John Lee, Lip-bu Tan, Mentor Graphics, Moore's Law, More than Moore, NVIDIA, Sequence Design, Synopsys, TSMC, Vik Kulkarni, Wally Rhines
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Thursday, September 21st, 2017
Silicon Valley based Blue Pearl Software is the quintessential EDA company: privately held, run by a seasoned team of EDA experts, and with a portfolio that includes tools for generating timing constraints, CDC analysis, both synchronous and asynchronous, RTL verification tools for methodology standards and design rules, and design management tools.
Similarly, Blue Pearl’s Ellis Smith is the quintessential CEO in EDA. Before founding his current company, Smith was CEO and President of Orora Design Technologies, CEO at TransEDA through that company’s IPO in 2000, and CEO at Exemplar Logic through its merger with Mentor Graphics in 1995. His experience also includes a stint as CEO at CrossCheck Technology, and years spent at Duet Technologies, CADAM, Versatec, Dictaphone, and 3M. Pretty much the whole history of the EDA industry in one CV.
It would be an excellent idea to sit down for a very long conversation with Ellis Smith to discuss his take on the history of this oh-so-interesting industry. Unfortunately, time was of the essence when I did get the chance to talk with him earlier this month, and the focus was principally on Blue Pearl.
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Tags: Altera, Blue Pearl Software, Cadence, ESD Alliance, Mentor, MicroSemi, Synopsys, Xilinx
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Thursday, August 31st, 2017
Amit Gupta is the quintessential entrepreneur in EDA. Even as he was graduating with degrees in EE and CS from University of Saskatchewan, he was co-founding Analog Design Automation, targeted at those who need tools to automate analog chip design. That was in 1999. The company was sold to Synopsys in 2004, and then Gupta co-founded Solido Design Automation in 2005.
This week, I had a chance to speak at length with Amit Gupta. The last time we conversed, it was at the January 2017 Kaufman Award dinner for Dr. Andres Strojwas in San Jose. That evening, Gupta was enthused about Solido’s access to high-quality engineering talent in Canada, and argued that the cost of living and quality of life in Saskatoon, where Solido is headquartered, more than compensate for any sense that Silicon Valley is the epicenter of the industry. His enthusiasm has only grown since that time.
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Tags: Amit Gupta, Analog Design Automation, Deloitte, Design Automation Conference, E3 Data Science, Eric Hall, ESD Alliance, finFET, GlobalFoundries, Gloria Nichols, Jeff Dyck, Mark Gilbert, NVIDIA, Qualcomm, Samsung, Saskatoon, SOI, Solido Design Automation, Sorin Dobre, Synopsys, Ting Ku, TSMC, UX design
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Wednesday, July 19th, 2017
Impersas CEO Simon Davidmann lead a tutorial at the Design Automation Conference last month in Austin. Prior to his presentation, we spoke by phone about the content of that tutorial.
“It’s a simple message we’re presenting at DAC,” Davidmann said, “but an important one. If you’re a semiconductor guy building a chip, your customers want to know what components are being used, but you also have to build the software that runs on top of it.
“There’s a lot of challenge, however, in getting an operating system up and running on the hardware and the problem extends to hardware-dependent software. Even the lowest level bits become part of the operating systems. So our tutorial is about what you need to do this work, about how to get hardware-dependent software running.”
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Tags: Agile, Altera, Cadence, CloudBees, Design Automation Conference, Imagination Technologies, Imperas, Jenkins, Linux, Simon Davidmann, Synopsys
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Thursday, June 1st, 2017
Master technologist John Sanguinetti has made major contributions to the EDA industry in the first decades of his career, and is now doing the same for the IP industry. After finishing his PhD at University of Michigan, Sanguinetti worked at DEC, Amdahl, Elxsi, Ardent Computer, and NeXT, was President at Chronologic, Modellogic, and CynApps, and was CTO at Forte Design.
In 1990 while still at NeXT, Sanguinetti became convinced he could write a better simulator than Cadence’s VerilogXL, so working nights and weekends for several months he wrote VCS. The potential of the tool inspired Sanguinetti and Peter Eichenberger to found Chronologic. They launched the product in late 1992, and sold the company to Viewlogic in late 1994. Synopsys acquired Viewlogic in 1997, and VCS has continued on there as a foundational element of the company’s verification strategy.
Currently Sanguinetti is serving as Chairman at Adapt-IP, but given his long and distinguished history with EDA, he agreed to opine this week on Grand Challenges in EDA. In the following conversation, he offers two Grand Challenges in EDA and two in Security, the latter being an issue of rapidly growing concern worldwide.
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Tags: AdaptIP, Cadence, Chronologic, CynApps, Forte Design, Grand Challenges in EDA, IoT, John Sanguinetti, Modellogic, NeXT, Peter Eichenberger, Synopsys, SystemC IDE, USB, VCS, ViewLogic, Xilinx
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Thursday, March 30th, 2017
Today is the day some EDA purists thought would never happen: The disassembling of an industry status quo that’s been in place for over 20 years
As of today, Mentor Graphics has been sold and is fully owned by Siemens. Now Mentor’s arc of history will be decided by folks not residing in the green forests and hills of northern Oregon, and the Big Three cartel is no more. A cartel which has slowly consolidated the playing field over time until nary a startup can be seen.
The power vested in the Big Three EDA companies has grown steadily and inexorably over these years, as has their market dominance. Examination of recent numbers provided by the ESD Alliance Market Statistics Service indicates that today, in excess of 85-percent of the revenue earned in the EDA industry can be attributed to the combination of Synopsys, Cadence, and Mentor Graphics.
These three companies, their leadership, sales prowess, and increasing control of the conversation and technical direction in the industry has made for a powerful cartel. But again, that cartel is no more and the crystal ball predicting future dynamics within the EDA industry has gone dark.
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Tags: Cadence, EDA Consortium, ESD Alliance, ESD Alliance Market Statistics Service, Gary Smith, Judith Marks, Mentor Graphics, Siemens, Synopsys, System-level design, Tony Hemmelgarn, Walden C. Rhines
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