Blue Pearl: Best kept Secret in EDA
September 21st, 2017 by Peggy Aycinena
Silicon Valley based Blue Pearl Software is the quintessential EDA company: privately held, run by a seasoned team of EDA experts, and with a portfolio that includes tools for generating timing constraints, CDC analysis, both synchronous and asynchronous, RTL verification tools for methodology standards and design rules, and design management tools.
Similarly, Blue Pearl’s Ellis Smith is the quintessential CEO in EDA. Before founding his current company, Smith was CEO and President of Orora Design Technologies, CEO at TransEDA through that company’s IPO in 2000, and CEO at Exemplar Logic through its merger with Mentor Graphics in 1995. His experience also includes a stint as CEO at CrossCheck Technology, and years spent at Duet Technologies, CADAM, Versatec, Dictaphone, and 3M. Pretty much the whole history of the EDA industry in one CV.
It would be an excellent idea to sit down for a very long conversation with Ellis Smith to discuss his take on the history of this oh-so-interesting industry. Unfortunately, time was of the essence when I did get the chance to talk with him earlier this month, and the focus was principally on Blue Pearl.
WWJD: It seems like several generations since we first spoke when you were at TransEDA. With Blue Pearl, it seems you’ve come full circle back to a traditional, small EDA company.
Ellis Smith: That’s correct. I was CEO of CrossCheck, Exemplar, and then TransEDA.
WWJD: Is EDA your comfort zone?
Ellis Smith: [chuckling] I have to say yes. I’ve been in EDA since 1986.
WWJD: How long have you been with Blue Pearl?
Ellis Smith: I started the company 13 years ago, a long time ago.
WWJD: Please remind me, what’s the origin of Blue Pearl as the name of the company?
Ellis Smith: Well, I sat down with a couple of friends from TransEDA and Microsoft one night, and over a couple of bottles of wine we wrote down 200 ideas for names of companies, googling them all along to check for domain names. And I’ve been spending time in Hawaii for a long time and wanted an island-sounding name, not tech-sounding.
Out of all the names on the list that night, this one was available. And interestingly, of the thousands of people I’ve met over the years since founding Blue Pearl, not one has ever said they didn’t like the name.
WWJD: What is the source of the technology? Acquisition? A university? In-house development?
Ellis Smith: It’s mostly been in-house development; a number of guys at Blue Pearl were with me at Exemplar. Most of the technology came out of guys who’ve been in the industry for a long time, including people who worked at Mentor, Synopsys, or Cadence. Some very good technologists that have been around for a long time.
We started by developing technology that followed a very similar strategy to what we developed at Exemplar – software that would make complex tasks far easier for engineers. We’ve always believed that people don’t use EDA software just to learn how to use it, but in order to design faster with more reliability.
At Blue Pearl, we are all about giving engineers a tool they can use without [spending] a great deal of time learning to use the tool, but also a tool that will accelerate their design process.
Our goal has always been to provide EDA software to people, where they could instantly integrate into their flow and begin using immediately. Often within a couple of hours of going into a company, we are running complex designs.
Most people hate to think about tool change because of the amount of integration and the [learning curve], but that is not the case with us. It doesn’t take weeks and months to integrate.
We offer structural and formal verification tools, clock domain crossing analysis, and tools that automatically generate timing constraints – all of which completely integrate into the system where you can look at any level of the design and do debug.
Again, our system is completely integrated with all the various tools you have in the suite, and are also integrated with FPGA flows and tool providers like Xilinx, Intel/Altera, and MicroSemi. People use us because they can actually find and fix errors faster than [without us]. We believe our tools are as good and accurate as any tools in the industry.
WWJD: Blue Pearl seems like a really prime acquisition target.
Ellis Smith: Well, we fly under the radar and are not looking for someone to acquire us. With our technology, however, we would be an ideal acquisition for a number of different companies.
In fact, Jim Hogan has said we’re the best kept secret in EDA. That’s because other EDA [vendors] have some competitive products, but we continue to gain ground on the competition.
Our best customers in the US and around the world are in mil-aero – that’s really our strong point as far as our customer base is concerned – although today, we are getting more and more consumer-related and health-care related customers, companies like GE Health.
WWJD: If you’re the best kept secret, does that mean that nobody’s doing what you’re doing?
Ellis Smith: Our products are off the scale as far as other tools [are concerned] in finding issues and fixing them.
WWJD: Cadence has purchased Jasper, should Synopsys purchase Blue Pearl?
Ellis Smith: There’s not a lot of overlap between us and Jasper.
The kind of things we have – the formal analysis part that we have in our design analysis – works very fast, and goes right into our clock domain crossing analysis. There are a couple unique things there: our patented solution, the User Grey Cell Methodology [see below], helps find unsynchronized crossings that are in everyone else’s black boxes.
We also have an advanced clock environment that allows you to order clocks within a domain so fewer crossings are done automatically, which significantly reduces the number of asynchronous clock crossings. You can visualize these results.
WWJD: Where are your customers?
Ellis Smith: Pretty much all over the world. We’re doing a lot in Europe right now, especially in the UK because they’ve got a large number of defense-related companies. And we have many mil-aero customers in the US, an area today where there’s lots of funding, money, and attention.
WWJD: Given your mil-aero customer base, do you have export problems into China?
Ellis Smith: Not so far.
WWJD: Is there internal competition from some of your customers?
Ellis Smith: I wouldn’t say it’s internal customer competition, although every customer has some of that, but we actually work with people where we can put our environment over their internally developed tools.
We also license parts of our technology to companies that have customer-owned tools that may not be as well-developed as ours are, and are very open to [this type] of licensing.
WWJD: Where do we stand today with asynchronous clocks? Still a problem?
Ellis Smith: Well, we can identify asynchronous or synchronous clocks, and can handle either. I just don’t think it’s a big problem right now.
WWJD: How does the slowing of node shrinkage, the slowing of Moore’s Law, affect your road map?
Ellis Smith: It doesn’t really affect us. That issue is much bigger and more difficult at the back-end.
We deal at the RTL level, where we’re looking at what is our capacity and our speed: How fast can we deal with a very complex design, how long does it take?
[The nature of our tools] means we’re very fast and have big capacity.
WWJD: What do you hope to accomplish in next 5 years?
Ellis Smith: We will go further upstream from RTL to higher levels of abstraction. We will also go more into the area of power analysis.
And we have developed a set of tools around what basically is an EDA management dashboard that large companies are starting to use. With our enterprise edition, we can make a customer management dashboard for those companies using our tools.
We’ve also done a tight integration with Xilinx, where you can push a button on Vivado, bring that data into our management dashboard, and store it. It offers a way to find out the problems in a design and fix them as fast as possible.
Really the question is always, how well are your tools integrated into the flows being used, because usability being the real thing. In other words, how fast can you verify the design and fix the problems?
WWJD: Do you encourage young engineers to go into EDA?
Ellis Smith: Certainly! This industry is very exciting, as exciting as it ever has been.
The kinds of challenges and opportunities today are very big, particularly if you look at the last several years in automotive. And that will continue to accelerate with self-driving cars. Also, another big area in the future will be security.
WWJD: Why do you belong to ESD Alliance?
Ellis Smith: Well, one of the biggest benefits: It’s a vehicle and venue to have fairly regular discourse with other people in the industry, not the customers who we meet all the time. It’s the best venue to have that discourse and dialog.
WWJD: When you interact with other ESD Alliance members is there a risk when you interact with competitors who are also members? Or is it instead, an opportunity.
Ellis Smith: Risk is not really an issue among members of the ESD Alliance. What you do get is a lot of insight into the marketplace, and a view to the challenges of the other companies.
And at times, you may also see opportunities for collaboration that you otherwise wouldn’t know about. If it wasn’t for the ESD Alliance, there wouldn’t be these opportunities.
The ESD Alliance is very important, more important than it’s ever been.
Press Release …
September 27, 2013 – Blue Pearl Software, the provider of EDA software that accelerates FPGA verification, today announced that it is shipping Release 7.1 of its EDA software, Blue Pearl Software Suite, for Windows and Linux operating systems. It includes many clock domain crossing (CDC) enhancements including CDC waivers and User Grey Cell.
“Release 7.1 addresses a critical verification bottleneck in the design flow,” said Ellis Smith, Chairman and CEO, Blue Pearl Software. “With the User Grey Cell methodology, designers using non-synthesize and/or protected IP can specify design attributes that enables chip-level CDC.”
Quality IP and processors are critical to SoC designers worldwide due to the increasing number of systems using FPGAs in production or as prototypes. However, designers do not always have access to synthesizable RTL descriptions and thus resolve to black-boxing these modules. This results in verification blind spots that prevent the detection of critical meta-stability issues during the verification phase.
The User Grey Cell methodology not only solves it, but provides the end user with a flexible use model to catch chip-level CDC. Release 7.1 includes sample designs to illustrate the key concepts/features. Release 7.1 new features include: User Grey Cell; CDC Waivers; CDC checks more granular; Black box signal direction detection; FPGA-vendor specific options pages.
Tags: Altera, Blue Pearl Software, Cadence, ESD Alliance, Mentor, MicroSemi, Synopsys, Xilinx