What Would Joe Do?
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
Solido’s Recipe: Platform, Patents, Customers, Poise
August 31st, 2017 by Peggy Aycinena
This week, I had a chance to speak at length with Amit Gupta. The last time we conversed, it was at the January 2017 Kaufman Award dinner for Dr. Andres Strojwas in San Jose. That evening, Gupta was enthused about Solido’s access to high-quality engineering talent in Canada, and argued that the cost of living and quality of life in Saskatoon, where Solido is headquartered, more than compensate for any sense that Silicon Valley is the epicenter of the industry. His enthusiasm has only grown since that time.
Amit Gupta: Things are going very well. We’ve been growing very quickly over the last 6 years, with revenue growth at 50-percent annually over those years. In fact, Deloitte recently recognized us as one of the fastest growing technology companies in 2016.
Our user base is growing globally, and we’re doubling our team this year from 55 to 110. The hiring is a combination of R&D to improve our existing products and develop new products, and into the application team to support our growing user base and new customer adoption.
WWJD: Give me quick update: Any recent releases?
Amit Gupta: Yes, earlier this year we made two big announcements. One was around ML Labs.
We’ve been really active in the machine learning space since we founded the company in 2005. Our initial product, Variation Designer, has a set of machine-learning capabilities that we developed over the last several years that can improve design coverage in far fewer simulations.
It handles a massive amount of data, large complexities of hundreds of thousands of interactions – and all extremely accurately, not just estimations.
We’ve built up these core technologies as part of the Variation Designer product line, and then put them into a platform through ML Labs, where we’re collaborating with early customer partners who want to apply machine learning to other areas within the semiconductor design challenges.
We’re working with a variety of customers to do that. And one of the new products we’ve come out with there is ML Characterization Suite.
It’s used by customers to dramatically reduce time for library characterization – memory library, standard cell library, or analog library. All very resource intensive, particularly with finFET and SOI design, and are just more examples of the Big Data design problems that need orders of magnitude reduction in design time and resources.
Both ML Labs and ML Characterization Suite were announced in April, and now we’re actively developing new products with our machine learning core.
WWJD: What exactly is machine learning as applied to EDA?
Amit Gupta: Machine learning, as applied is EDA, is where you want the machine to learn through data, instead of pre-programming a set of rules or criteria at the beginning.
The software has a feedback system that can learn from the data sets, and then creates predictions for regression models, classification models, or other things of that nature. Our products take the data sets customers are generating, and very accurately develop new results based on the data. We actually have 15 patents in this area.
How we differentiate: Ours is machine learning for engineering applications, which is very different from the off-the-shelf machine learning libraries you get out in the public domain. That’s what makes machine learning engineering different from the standard.
We had a panel at DAC in June where Qualcomm, NVidia, and a former Broadcom employee, all talked about how they use our machine-learning software, and the future and potential benefits for EDA.
We have videos of those presentations on our website.
WWJD: Performance, area, power – the great triumvirate in EDA – how are those things enhanced through machine learning?
Amit Gupta: Well, they absolutely are.
What we talk about is over-design, the corollary is under-design. If you’re over-designing, you’re leaving some performance, power or area on the table. If you’re under-designing, you’re taking yield losses.
This is particularly important in automotive where you need high reliability, and [chips that can] work in all the different conditions. There is need for Six Sigma, and now even Seven Sigma for automotive.
For mobile computing, low power and high performance is important. For high-performance computing, it’s performance. For IoT, it’s low power. These are the various growth areas that we’re seeing on the semiconductor side.
But no matter the application area, the challenge in reducing over-design and under-design is to get the design coverage that you need.
And this is where machine learning is able to provide a disruptive advantage over brute force, or the semiconductor designers’ ad-hoc cutting back on the amount of simulation or coverage they’re measuring based on prior experience – or making assumptions that aren’t valid.
Machine learning allows our customers to get ‘brute force’ accuracy, but in a fraction of the simulations. Plus they can see where all the problems are in the design, where the design needs to be improved for power-performance-area and yield.
It’s providing huge benefits [to the industry].
WWJD: EDACafe’s Mark Gilbert does EDA recruiting and is quite bullish on the industry from an employment point of view. Do you agree, and is Canada still a draw for young talent?
Amit Gupta: Absolutely. What’s unique about EDA is a level of complexity, the challenge of the problems that our software developers or application engineers are solving.
This is obviously software being used by designers to design chips, and the complexity of the developing this software compared to that of web applications is very high. And the problems are always changing: 60 and 40 nanometers was less complex than problems at 14 and 10 nanometers, and now there’s SOI and finFET.
The complexity of the space is always increasing, so there are very interesting problems for our employees [to tackle].
We’re also able to bring on a whole machine-learning, data-science capability here in Canada. Again, so we can attract the brightest and the best – employees here locally, as well as across Canada.
And unlike Silicon Valley where there’s a lot of competition for talent, the competition is not so high here, so we can attract and then retain. The average length of stay of our employees is several years, during which they continue to work on very challenging problems.
We’ve been able to attract very good employees, and retain them, so the knowledge base of our team is very high. As a result, we’ve built up a really solid team.
Integration, the machine learning side, and UX [user experience], something we emphasize at Solido, as well as a very intuitive user interface for our customers, so our tools can be utilized by many within the customer company. At this point, we have over 2000 users globally, and not just because of the algorithms under the hood, but also for the ability of designers to adopt our software.
WWJD: I recently watched a 2015 video from a panel you were moderating at DAC where you cited some very interesting statistics about EDA tool users, their preferences for simulators, and other such things. How did you get that information? It seems extremely valuable, and difficult data to extract from the famously clandestine world of chip designers.
Gloria Nichols: [also on the call] We’ve done this study for several years. Our most recent one includes 3 years’ worth of tracking, which allows you to see the consistency and also the trends. It’s one of the things I do, to run anonymous surveys online.
We only invite users in blind surveys, which require a lot of email and follow-up. People used to tell us that users wouldn’t respond to this [type of outreach]. But if they participate, they get to see the information, so not surprisingly they’re very willing [to be involved].
Amit Gupta: For us at Solido, it’s really about getting a sense of the market and the direction. What the trends are in simulation, on the Spice simulation side.
We recently added a part of the survey to cover the library characterization space, because we’ve entered that space. It gives us a really good global view, what the trends are in the industry and goals of the customers.
We do get other data from the customers, at the user and at the executive layer, but this study provides another layer of learning. We’re putting our efforts in R&D and customer applications [based on these studies].
WWJD: What about creating new markets, and not just following the trends?
Amit Gupta: If you look at our customer base, there’s a subset that we call early adopters, working at leading edge technologies and seeing the upcoming problems.
We have foundries as customers, IP companies as customers, semiconductor companies as customers, and a subset of this group have a view into what’s next. Then we have a view into what their problem statements are with respect to designing at that next node, and can work with them to develop solutions.
We bring to the table a very strong algorithmic understanding of how to solve these problems, a team that can develop and productize those solutions, and a strong UX to make the customers happy. We work with the leading foundries and semiconductor companies to develop the products, and then work with mainstream companies, the more lagging-edge companies, to deploy it out to them.
That’s our recipe – platform, the patents, and customers we can work with – all part of the Solido recipe.
WWJD: What do you think the sweet spot now is for process nodes? Is the IoT helping to revive interest in the older nodes where so many of the bug have already been eliminated?
Amit Gupta: We’re seeing a few trends here.
One is the advanced nodes, 7 nanometers is happening. The kinds of applications being designed at 7 nanometers are still mobile and high performance, while the foundries like TSMC, Samsung, and GlobalFoundries are continuing to invest in these leading-edge nodes to serve that market.
And we see that 22-nanometer FD-SOI design is happening, with trade-offs between finFET and SOI in terms of cost-versus-performance.
There’s also more variance being created for the more mature nodes. At 40 and 65 nanometers, there’s the low-power variance. For IoT you don’t need such high performance, but you need more power and cost sensitivity, so you could use a larger node but the lower power variance.
What’s interesting there from a tools perspective, historically there was the race to the advanced nodes and making tools just for those advanced nodes, dealing with those design challenges.
But now, even at 40 and 65 nanometers where you’re turning down the supply voltage, the design no longer behaves linearly. Instead there are non-Gaussian effects from a manufacturing and power-performance-area perspective.
And that’s one important area that we’re addressing, the more mature, but lower power nodes.
WWJD: How do you have time to sleep?
Amit Gupta: [laughing] I do have a lot of interactions with customers. I spend 75-percent of my time traveling and meeting with my customers globally. I was just in India last month, in Taiwan before that, and in the San Francisco Bay Area before that.
The Number One thing any EDA company needs to do is to stay in touch with their customers. Speaking directly with customers, and finding out from them what their design challenges are, is important. And they’re very open with us, so we’re able to take those needs and develop a software solution in a matter of months. And they need those tools
WWJD: You are on the Board for the ESD Alliance. What benefits do you garner from being on the board, or being in the organization in the first place?
Amit Gupta: When I joined the EDS Alliance, I consistently heard about things the Alliance has provided for small/medium-sized companies – yet those programs weren’t really around any more: CEO forecast, networking opportunity receptions, marketing benefits.
The reason I wanted to join the board was to represent the medium and smaller vendors, and make sure the ESD Alliance was again delivering value to the community as a whole, not just to the large companies.
I’ve worked closely with Bob Smith [ESD Alliance Executive Director]. He’s done a fantastic job in re-energizing and re-branding EDAC to ESD Alliance, having a lot more events, creating more marketing promotion opportunities, and having information about regulatory matters for the membership.
Bob’s done an outstanding job, and with him I’ve really been focused on the value provided – not just in EDA, but also for IP companies.
WWJD: What’s the funniest thing that’s ever happened to you as a tool provider in EDA? Does anything ever happen in that world that’s amusing or fun?
Amit Gupta: So I come from a founder, entrepreneurial background. I started Analog Design Automation back in 1999, when we raised $8 million in [start-up capital]. In 2004 we were bought by Synopsys, and then I started Solido in 2005.
For me, just being in EDA and being an entrepreneur within that space, going through the boom times of 1999 and the bust time of 2001, and again the 2005 boom and the 2008 crash – through all that, it’s been a really good experience to build a company like Solido. To be sure that we’re doing all the right things to withstand the downturns, while also taking advantage of the upturn opportunities.
As a team at Solido, we’re really proud of the company we’ve built and the customers we’re serving. We’re aggressively hiring this year, and next, to build out new products in the machine learning space.
We’re very bullish about semiconductors and EDA. And in all of that, being an entrepreneur and a CEO is a great experience.
WWJD: Well, that’s not exactly funny, but it’s certainly uplifting.
Amit Gupta: At the Design Automation Conference this year, we thought things were just amazing. We’ve already seen meetings that we had at DAC in June converted into evaluations, and into business for us. The support system of the ESD Alliance and DAC really help Solido to thrive in the market.
Tags: Amit Gupta, Analog Design Automation, Deloitte, Design Automation Conference, E3 Data Science, Eric Hall, ESD Alliance, finFET, GlobalFoundries, Gloria Nichols, Jeff Dyck, Mark Gilbert, NVIDIA, Qualcomm, Samsung, Saskatoon, SOI, Solido Design Automation, Sorin Dobre, Synopsys, Ting Ku, TSMC, UX design