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 What Would Joe Do?
Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

The Future: EDA Hiring faces Headwinds

December 14th, 2017 by Peggy Aycinena

The leading EDA recruitment guru, Mark Gilbert,
regularly sends out info about job openings to his extensive contact list. In a recent such email, I took the time to read the job descriptions in detail and was amazed. These openings are so technical and so unique, I had to call Mark.

“These job requirements are so specific,” I said when he picked up, “surely there can’t be more than a few dozen people who fill the bill. How do you ever find them?”

Mark laughed: “You’re right. There are so few matches for these companies, given their job requirements and the correct combination of skills they’re looking for. For me to fill one position, I can look at several thousand resumes. And each resume is incredibly comprehensive.

“But I’m looking for the one guy that has this and that skill, but not the other. Yet there are very few people who have those qualifications.”

“In fact,” Mark continued, “just yesterday, I called up a client company that’s looking for a Formal verification AE. The candidate has to have residence or citizenship, or already have a green card.

“So far I’ve gone through 1500 resumes looking for a candidate, but no one [I’ve reached out to] is writing back. Clearly, we will have to broaden the search.”

The problem in this case, Mark noted, is one that he sees with many hiring companies: “These guys don’t want to train. The companies just don’t have the bandwidth or resources to bring someone up to speed. They want that exact someone to come on board and make a difference yesterday.”

“But the technology is all so new and so precise. Just because you do Formal verification, doesn’t mean you’re a Verisity or a 0-In. Some kind of training is going to be necessary, so I try to argue with the companies: Why not hire someone who’s 80-percent of the way?”

Still Mark says he has trouble getting his clients to accept the reality of today’s hiring challenges.

“Everything has to be perfect or they won’t hire. Even the wrong hair color can disqualify a candidate,” he said, laughing.

“Wait,” I said, “isn’t that illegal?”

“I’m speaking metaphorically,” Mark said. “Of course it’s illegal, even in EDA.”

Impressed with the agonies of the talent hunt, I asked Mark what keeps him going.

“Well,” he said, “I learned long ago that it’s better to be a big fish in a small pond – and that’s me. EDA is very finite, very small in relative terms to the much bigger space that we provide services to after the technology leaves EDA.”

“If you go to IoT, for instance, it’s a never-ending mirage of possibilities. There are just so many directions to go in.

“If you’re on the automotive side, so many directions to go. If you’re building Android or Apple technology, so many directions. There are endless, infinite directions.”

“But in EDA,” Mark insisted, “it’s very finite.

“You’re doing the design of a computer chip. You’re giving the other companies the ability to do what they want to do in silicon. The possibilities there are very finite.”

And, per Mark, the problem is compounded: “As it sits right now, EDA is so technology specific and so small, it’s really not growing as an industry. And that’s not just in relative terms. This is the important element – EDA is not growing as an industry in absolute terms.”

“So with all of that, I’m the most well-known, provide the best service, understand the technology, and know the candidates. I remain the figure-head of the [recruitment game].”

Struck by the starkness of Mark’s analysis, I asked, “Does anybody ever want to switch into EDA from other technology sectors, effectively enlarging the pool of candidates?”

Mark laughed and said, “I’ll answer your question, but in reverse.

“Yes, people do want to switch over – but in reverse. They want to switch out of EDA. Every day, I find people who want to transfer out of EDA because, unfortunately, we are in a business that has no excitement.

“You know, as a developer you can go to Facebook, you can go to Google. There you’ll have a big playground, a basketball court, and all of your friends know these companies.

“The companies that are bringing us driver-less cars and the latest applications – they have sizzle, a lot of global possibilities, and there are extensions beyond just their current [involvements].

“But in EDA, it’s: I’m developing a circuit at 10 nanometers.”

“Wow,” Mark chuckled, “that sounds so fascinating!”

“Hmm,” I responded, “are you saying that people from EDA aren’t very good company at cocktail parties?”

Mark laughed, “Yes!”

“And would you, therefore, discourage young people from coming into EDA?” I retorted.

Mark responded instantly, “No! I believe in EDA. It’s the foundation of all computers.

“Without EDA, there are no computers, no cell phones, no technology. It all starts with us!”

Backtracking even further, Mark acknowledged: “It is kind of exciting to be developing the geometries of these incredibly small components. The things that are doing so much to change our lives.

“It doesn’t have the sizzle, the social applications [that are attractive] when you’re coming out of college. But if you’re a math genius and if you can sit and code all day, EDA is truly a great place.”

I asked if all of this means the hiring companies have to be more respectful of their limited pool of candidates.

“In a climate where you have such great needs,” Mark responded, “and there are so few people who fit those needs, it seems to me – particularly if you’re a smaller startup – that you should treat these candidates with respect and integrity, because they are your future.”

“Especially,” he emphasized, “since you don’t have that many people to pick from.

“So when you get the opportunity to talk to someone who’s even close to being a fit for your position – your brothers and sisters that come from same road map that you came from – the least you could do is to treat them with respect, and give them a timely and fair shot.

“I can’t tell you how many deals that have fallen through, because the hiring company is busy or the candidate’s hair wasn’t the right color – figuratively speaking, that is.

“It is a very hard pool to hire into. And for a startup, it’s incredibly important to treat candidates with dignity, particularly because these days nobody is bailing out of the mother ships – Cadence, Synopsys, or Mentor – so finding people is incredibly hard.”

I asked Mark if he ever wants to throw in the towel.

“The last several years have been the most difficult in my career,” he said, “but I’m sticking it out.”

“Besides,” he laughed, “I’m not smart enough to learn the new technologies!”


Current Job Opening …

Senior FAE- Field Applications Engineer    Silicon Valley   Req # 4492

This very successful company with industry respected Formal verification tools is looking for a strong technical support engineer. The right engineer must have both the pre-sales knowledge and understand the post–sales support side as well, including solutions for functional verification of complex modules, IP, processors, and sub-systems, as well as solutions for synthesis verification for both ASIC and FPGA designs. FAE tasks include technical presentations and demonstrations. Writing white papers, success stories, and application notes are additional job functions.

This quite successful company is a pioneer in advanced Formal techniques to solve practical verification challenges. Focusing on Formal verification of chip designs allows them to provide unique, award-winning solutions for tough problems, based on a leading, high-performance technology platform.


  • Strength in ownership of the technical side of the customer relation in developing business.

  • Understanding of the value of a close working relationship with the VP Sales.

  • Support customers so they apply property checking solutions for formal verification of complex modules, IP, processors, and sub-systems, as well as equivalence checking solutions for synthesis verification for ASIC and FPGA designs.

  • Create and perform technical presentations and demonstrations at customer site.

  • Drive and manage technical evaluations at customer site.

  • Play a key role in trade shows, verification seminars, and marketing by developing tutorials, application notes, training materials, writing white papers, and success stories.

  • Identify and qualify relevant verification projects at the customer’s site to increase usage of the product range.

  • Drive product improvements, feature qualifications and methodology definitions by interfacing tightly with customer support and R&D to enhance products and user experience as the basis for success.


  • Master’s degree (or similar) in electrical engineering, microelectronics, computer science or physics

  • 4+ years of relevant experience in Formal verification of digital circuits is a prerequisite. Knowledge of verification languages (SVA, PSL), verification methodologies and tools

  • Working knowledge of HDLs such as Verilog, SystemVerilog, and VHDL

  • Capability to navigate within customer organizations and mobility to work with customers on-site

  • Strong communication skills to interact with external customers and internal engineering staff’


PRODUCT LINE MANAGER…PLM…1st choice Valley but open #4481

This terrific Director level position with a Major Non-EDA company seeks a very “technical” Product Line Director and more…

The CMOS Platform Business Unit RF PLM Director is responsible for driving the business results of the mmWave portfolio of RF CMOS product offerings across their technology platforms. This includes RF solutions for mobility transceivers and connectivity applications as well as advanced applications such as mmWave radar for consumer, industrial and automotive markets.

The right candidate will own product offering planning and definition, and build the roadmaps, differentiation, competitiveness analysis and positioning, product offering extensions, alignment with Segment on TAM/SAM assumptions, sub-segment opportunity selection, offering strategy, business planning, business case development and approval, management of product line P&L, go-to-market collateral development, customer engagement on product line DWIN, DWIN and forecasting planning, design loss review, standard costing, customer pipeline forecasting, analysis of asset utilization and overall management of decisions on the product line.

This role will work closely with the Product Line owners for the Platforms and Analog Power, embedded memory and Segment teams to create a comprehensive portfolio of RF offerings that are integral to, and build upon integrated solutions at the system level that enable differentiation in the customer solution.

This role reports to their Sr. Director of RF CMOS Platforms Product Management.

Essential Responsibilities:

* Product offering definition and development
* Program planning and execution
* Lead a cross-functional team of RF experts
* Market TAM/SAM analysis with Segment Marketing for product positioning and value proposition definition and articulation for the CMOS Platform RF applications.
* Business case planning, development and analysis, including R&D and capital investment, asset utilization planning and analysis of needed investments, value proposition to inform pricing committee and go-to-market approach for marketing collateral
* Coordination with Design Enablement/TD/fabs to plan and execute new product offerings
* Definition of continuous improvement roadmap for performance, cost, quality or featuring
* Staff, develop and train the organization world-wide
* Define and implement effective systems to manage and monitor the success of product development programs and engagement with customers
* Build and employ systems to process and manage customer engagement with marketing collateral, sales materials, etc.
* Provide feedback, coaching, and conduct performance reviews for direct reports. Ensure similar processes are effectively conducted throughout organization
* Prepare consolidated annual operating budget
* Perform all activities in safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs

Required Qualifications:

* BSEE or another relevant technical degree
* Subject matter expertise in RF transceivers, connectivity and mmWave applications and system-level solutions
* RFIC design experience in CMOS or SIGe or RF design experience on board is a must
* Technical marketing experience is a plus
* 15 years working in RF semiconductor product line, marketing and sales
* 5 or more years leading a semiconductor marketing team

Preferred Qualifications:

* Comfortable talking about semiconductor design, EDA, IP and end applications
* An appropriate balance of creative “out of the box thinking” and an understanding of tried and true methods
* A bias toward action, ability to plan effectively and very comfortable working with data
* Strong ability to use appropriate influence and persuasion skills
* An MSEE or MBA with a marketing concentration are preferred
* Subject matter expertise in RF transceivers, connectivity and mmWave applications and system-level solutions
* Technical marketing fundamentals: whole product, defensible market segments
* Solid and demonstrated grasp of high-tech marketing best practices: new product definition, new product introduction, marketing campaigns
* Technical knowledge and ability to engage senior level technical experts internally and externally
* Experience leading in a globally dispersed environment with team members located in multiple locations and an ability to work in a matrixed environment

There will be travel up to 35% of the time both domestically and internationally. Send resume to, then call 305-598-2222


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