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 What Would Joe Do?
Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at She can be reached at peggy at aycinena dot com.

Verific: Sowing good, Reaping great

December 21st, 2017 by Peggy Aycinena

Verific Design Automation in based in Alameda
, not exactly Silicon Valley, but close enough to be within driving distance. The company has been in existence for almost 20 years and reports few competitors, if any. Instead, they see themselves as the de-facto standard for HDL language parsers, and as such can be found in just about every chip design flow.

In fact, according to Rick Carlson, Verific VP of Worldwide Sales, he’s more astonished with each passing day just how many places applications developed on top of Verific can be found. Not because he doubts the quality of the product, but because of the wide diversity of industries who are now developing chips.

Rick Carlson also knows a thing or two about building collegiality between the companies that constitute the EDA industry. He was one of the founders of the EDA Consortium 30 years ago, and the Phil Kaufman Award. We spoke at length last month.


WWJD: How are things going with Verific?

Rick Carlson: Things are going really well. It’s easy to see why customers like using Verific.

Customers like Qualcomm, Apple, Nvidia and Samsung are building chips, and are going to buy major design flows from Synopsys, Cadence and Mentor.

Nonetheless, when these customers obtain their flows from the big EDA players, they are also looking at adding to the flows with custom applications that are specific to their silicon offerings/IP. They are looking for solutions to specific silicon capabilities and ways to create custom IP that will stand out from their competitors.

Meanwhile, no matter which of the big EDA players they go with, companies come to Verific – to use the Verific platform to create specific silicon functionality that is pertinent to their product like low power. It’s their competitive edge. They can develop the IP they need by licensing Verific and creating the functionality that they can then integrate into their mainline flows to create their competitive IP.

How pervasive is Verific? Our platform is in use by almost all of the major chip companies and EDA companies.

WWJD: Any recent announcements out of the company?

Rick Carlson: Verific recently acquired the Invio product from Invionics in June. Invio was developed by former chip designers to accelerate application development and it is written on top of the Verific platform.

Invio is a set of 100+ high-level APIs that makes the job of creating custom apps much easier. And now it is tightly integrated into Verific. Invio is in use today at some of the largest chip makers in the world.

The Invio platform is meant for CAD, design, and verification engineers. Invio is an easy to learn C++ or Python API built on top of Verific’s SystemVerilog and VHDL platform. It also provides a custom GUI builder, an application packager, and a suite of application specific plug-in modules for RTL modification, functional verification, netlist modification, and SoC assembly.

Another item of interest: With low power design being so important today, we recently announced support for UPF 3.0, which is the latest IEEE 1801 standard. With low power being extremely important these days, Verific again is leading the way.

WWJD: Why don’t EDA companies develop their own parser platforms?

Rick Carlson: Actually, they do.

What is interesting to note is that the EDA startups that use the Verific platform often get acquired by the Big Three and they continue to use Verific after the acquisition, instead of switching to the acquirer’s language parsers. It’s pretty simple, and ours is reliable and affordable.

WWJD: It’s clear that Verific has a great track record helping out startups.

Rick Carlson: Verific, in a sense, is a VC.

We work with startups that need the Verific platform, and may have not been funded. We work with them through the development phase of their product by providing them our development platform and support at no charge until they get to the MVP [Minimum Viable Product]. By using the Verific platform, they can shave months, if not years, off the time to develop their product.

We’ve been lucky in that we’ve had a very good track record of backing many successful startups. When you look at the EDA startup story, at any one time we have a list of 6 or 7 we’re working with.

These companies have the funding issues and have to figure out how to get into a customer’s flow between their design cycles and tapeout. And the time between releases is shrinking, so it’s even tougher to find the time to get into those customers’ flows.

But still, getting interest from the end-user customer is very challenging. The purchasing groups at those big customer have negotiated decades’ worth of agreements with the big EDA companies, and they will expect the same deep discounts from the small startups that they get from the big vendors.

And the startups don’t have the built-in sales channels that the big companies have. So to become successful as an EDA startup, it requires building a highly differentiated, high-value product, and being in the right place at the right time.

For our EDA startup licensees, we have seen many of them find success.

WWJD: You’re undoubtedly discussing exit strategies all the time with the startups you help out. Does Verific have an exit strategy?

Rick Carlson: We are having too much fun to think about an exit strategy.

We have such great rapport with our licensees, whether it’s a Fortune 100 or an EDA startup. And with development and support in the US and India, we are with our customers 24/7.

Why have an exit, when you have a quality product that customers appreciate and you are having a great time working with them?

WWJD: Is the IoT helping to revive interest in the older nodes where so many of the bugs have already been eliminated? Are there other technologies that are changing the game?

Rick Carlson: People plan for new nodes years at a time, because they are always expecting process nodes to shrink. So yes, the IoT is changing that somewhat.

But so is this movement towards RISC-V, It’s taken a little while to from a chip perspective, but I think ARM and Intel should be a little concerned.

Meanwhile, there’s no question about it: Everyone that matters is betting the farm on AI, whether it’s Microsoft or Google. If you don’t have AI, at least in your marketing verbiage, and are not supporting or developing a product in AI, you’ll be seen as missing the boat.

So yes, IoT, RISC-V, and AI are the three things getting everyone’s attention.

And then there’s self-driving cars. They’re definitely in the initial stages, but if you owned a car that was actually capable of driving you safely and autonomously, life would really change.

WWJD: I know you were one of the founders of the EDA Consortium, now morphed into the ESD Alliance. What motivated you to found EDAC?

Rick Carlson: It seemed like the right thing to do at the time. Here were a collection of companies, big and small, all trying to deliver solutions to the electronics industry.

When I started in EDA, there was Calma, Applicon and Computervision. Then along came Daisy Systems, Mentor Graphics and Valid Logic. By the second half of the 1980s, there were dozens of companies and having a formal organization made sense, if nothing else, to collect data and report the industry results.

Over the course of time, EDAC created much more, and the ESD Alliance is now trying to sort out how to move to the next phase.

Together with co-founder Dave Millman, we were able to convince the big EDA companies, as well as the startups, to sit together in the same room and discuss the industry itself. How could we all work together to grow the pie?

When Phil Kaufman, who was so helpful in the launch of EDAC, passed away – I suggested that we create a special award to honor our most prestigious contributors, and today we are about ready to award the 23rd recipient.

WWJD: It sounds like you really love your work.

Rick Carlson: Actually, I pinch myself everyday because of having the opportunity to do this work.

I got my degree in mathematics and computer science at IIT, the one in Chicago, in 1970 and I left shortly thereafter to move to Cupertino – oddly named after a Franciscan monk – so I’ve been in this work for a long time and was lucky to stumble into the CAD industry working for Calma in 1980.

Today, when I talk with customers and hear the problems they are trying to solve, it’s still exciting to me. The fact that the US economy rises and falls based on whether Apple can deliver the next shiny thing on schedule is amazing.

Recently, a low-latency trading company using FPGAs called us wanting to update their trading software. Never in a million years, would I think this type of company would call Verific.

WWJD: What’s one of the most interesting stories from your career?

Rick Carlson: I met Steve Jobs in 1981 while working at Mentor. Apple was developing the follow-on product to the Apple 2.

Steve said, “The internal code name is MacIntosh,” and we all laughed.

There were many companies at the time developing PCs – Northstar, Apple, Commodore, Atari, Sinclair and so on. No one would have guessed that Apple would become the world’s most valuable company 30+ years later.

Selling design tools to Steve was probably one of the most memorable moments in my career.


Bio …

Rick Carlson is VP of Worldwide sales for Verific. He’s a 35-year EDA veteran of the EDA industry and joined Verific from AccelChip, where he held a similar position. Prior to AccelChip, Carlson was VP of Sales for Averant, Synplicity, Escalade, now part of Mentor Graphics, and EDA Systems.

Carlson also founded the EDA trade organization in 1987, the EDA Consortium. He has a BA in Mathematics from Illinois Institute of Technology in Chicago.


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