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Archive for June, 2017

SmartFlow: The Importance of Export Compliance

Thursday, June 22nd, 2017

 


Below is a contributed op-ed piece
from SmartFlow Compliance Solutions CEO Ted Miracco, and company AE Akshay Dhule.

I last spoke with Miracco in November 2015 when the company launched, offering tools and strategies to software companies who have lost product to theft and piracy. At the time, Synopsys was dealing with a publicly-acknowledged system breach, so that conversation with SmartFlow was particularly pertinent.

This current piece, however, is about export compliance, a topic also of intense interest to the EDA industry.

Cadence’s Larry Disenhof is the industry’s subject expert in this area. Having heard him speak numerous times, although the piece below ends with a plug for SmartFlow, Disenhoff would undoubtedly agree with an articulate reminder that export compliance is neither optional nor for the faint of heart.

The message is clear: If you’re running a software company, ignore these issues at your own peril.

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UltraSoC: Addressing their Customer’s Customer

Thursday, June 15th, 2017

 


UltraSoC is on a roll
, having just wrapped up an energetic participation in the last month’s RISC-V conference in Shanghai, where UltraSoC CTO Gadge Panesar was a speaker. Additionally, the company is announcing “new funding, new investors, and new board members” – including UC Berkeley’s Alberto Sangiovanni-Vincentelli.

When I spoke this week with company CEO Rupert Baines, he started with Shanghai: “There is so much interest in RISC-V in China. The attendance there [exceeded] the headcount at the previous meetings at Google and MIT, although the numbers may be confusing as there were so many students at the Shanghai event.”

Asked if the RISC-V event would be in China again, Baines said, “I believe going forward there will be one conference in the U.S. each year, probably in Silicon Valley, and one international. Nvidia sponsored the latest one through their presence in Shanghai.”

Turning to UltraSoC, I asked about the company’s origin, market and competition.

Baines said, “We do semiconductor IP that solves a problem. The chips are so big and complicated today, understanding how they work – with lots of processors and lots of software interacting with each other and the real world – is incredibly difficult.

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Aart de Geus: Grand Challenges in IP

Thursday, June 8th, 2017

 


This is fourth in a 4-part series on Grand Challenges in IP
. Previous dialogs featured Sonics CEO Grant Pierce, CAST-IP Board Chair Hal Barbour, and Silvaco IP Division GM Warren Savage. This final, lengthy conversation is with Synopsys co-CEO Aart de Geus, winner of the 2008 Phil Kaufman Award.

To say Aart de Geus is synonymous with Synopsys, an organization he’s led for over 30 years, is not an understatement. His entire professional zeitgeist is wrapped up in the company. Neither is it an understatement to say de Geus is always on-message, always on-point. The interview below is no exception.

Dr. de Geus’ vision of Grand Challenges in IP is informed by the daily, working realities of the needs of the customers that constitute the IP market, and an IP vendor’s evolving response to those needs. We spoke by phone on June 1st.
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Warren Savage: Grand Challenges in IP

Thursday, June 1st, 2017

 


This is the third in a four-part series showcasing Grand Challenges in IP
. The first two conversations were with Sonics CEO Grant Pierce, and CAST Board Chair Hal Barbour.

This week’s dialog is with Warren Savage, founder and CEO of IPextreme. The company was purchased by Silvaco in 2016, where Savage now serves as GM of the IP division.

Warren Savage has been an energetic leader in the IP community, working to get companies in the industry to link arms, address common concerns, and give greater visibility to the importance of their products in the global semiconductor supply chain.

When we spoke on May 24th, Savage began by addressing my question about protection for IP blocks as they move down the manufacturing chain

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DownStream: Solutions for Post Processing PCB Designs
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TrueCircuits: UltraPLL



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