Posts Tagged ‘ESD Alliance’
Thursday, December 21st, 2017
Verific Design Automation in based in Alameda, not exactly Silicon Valley, but close enough to be within driving distance. The company has been in existence for almost 20 years and reports few competitors, if any. Instead, they see themselves as the de-facto standard for HDL language parsers, and as such can be found in just about every chip design flow.
In fact, according to Rick Carlson, Verific VP of Worldwide Sales, he’s more astonished with each passing day just how many places applications developed on top of Verific can be found. Not because he doubts the quality of the product, but because of the wide diversity of industries who are now developing chips.
Rick Carlson also knows a thing or two about building collegiality between the companies that constitute the EDA industry. He was one of the founders of the EDA Consortium 30 years ago, and the Phil Kaufman Award. We spoke at length last month.
(more…)
Tags: AI, Apple, Applicon, ARM, Atari, Averant, Cadence, Calma, Commodore, Computervision, Daisy Systems, Dave Millman, EDA Consortium, EDA Systems, EDAC, Escalade, ESD Alliance, Go, IEEE 1801, IIT Chicago, Intel, Invionics, Mentor, Microsoft, Northstar, NVIDIA, Phil Kaufman Award, Qualcomm, RISC-V, Samsung, Sinclair, Steve Jobs, Synopsys, Synplicity, UPF 3.0, Valid Logic, Verific
No Comments »
Thursday, December 7th, 2017
Academics are a special breed of animal, especially those who have also succeeded in business. They vacillate wildly between the conventional and the visionary, between the tangible realities of life and the far-flung concepts of blue-sky, what-if thinking. And this year’s Kaufman Award winner is no exception.
Professor Rob Rutenbar grew up in the suburbs of Detroit, did his undergrad at Wayne State University, his PhD at University of Michigan, was on the faculty at Carnegie-Mellon for 25 years, during which time he co-founded Neolinear and sold it to Cadence, and then picked up and moved to the University of Illinois Urbana-Champaign, where he put the university and his own perseverance to the test by igniting the move to massively available online education. Now just this year, he has returned to the East Coast as Senior Vice Chancellor for Research at the University of Pittsburgh.
All of this is very comprehensible and logical, but only on the face of things.
In fact, by his own admission, no small part of Rutenbar’s success is based on attendance at a random barbecue years ago, a bit of simultaneous happenstance, and a restless interest in what’s around the next corner. Which of course, is the classic definition of a bohemian. Or in Rutenbar’s case, the definition of a Kaufman Award winner.
[Spoiler alert: The following may include narrative that will appear in Rob Rutenbar’s talk on Thursday, February 8, 2018, when he accepts the Kaufman Award at the CEDA/ESD Alliance dinner in his honor in San Jose.]
(more…)
Tags: Alberto Sangiovanni-Vincentelli, Cadence Design Systems, Carnegie Mellon University, Center for Circuit and System Solutions, Charles Bunzli, Coursera, ESD Alliance, IEEE CEDA, John Cohn, Kaufman Award, Martin Wong, MOOC, Neolinear, Patrick Groeneveld, Ramesh Harjani, Rick Carley, Rob Rutenbar, Ron Rohrer, Tom Beckley, University of Illinois Urbana-Champaign, University of Minnesota, University of Pittsburgh, Voci Technologies Inc.
No Comments »
Thursday, November 30th, 2017
Of all the stories associated with Cadence Design Systems, the saga of Lip-Bu Tan might be considered the most unlikely. After all, this is the company that launched one of the most flamboyant CEOs in the history of EDA, followed by one of the most outspoken, then one of the least prepared given his non-tech provenance, and finally one of the most distinctly over-paid in the history of the industry and Silicon Valley.
And all of that even before the corporate cataclysm of 2008. Few at the company in the fall of that year may have noticed the economy teetering on a cliff, because they were too busy tracking unbelievable developments within their own firewall.
On October 15, 2008, a thorough house-cleaning gutted the executive suite: The CEO, all EVPs, and a smattering of others were out, leaving the company leaderless and without an apparent rudder. Instantly the company stock tanked and more than a dozen shareholder lawsuits erupted from that special place from whence such things spring as spontaneously as lawyers after an ambulance.
Into this chaos stepped Lip-Bu Tan. Admittedly, he was no stranger to Cadence having been on the board for several years at that point, but was neither chairman like Stanford’s John Shoven, nor an EDA household name like Berkeley’s Alberto Sangiovanni-Vincentelli.
Also surprising: On paper Tan looked more quintessential VC than quintessential CEO, given his track record founding and managing Walden International’s $2 billion investment portfolio. Nonetheless, it was Lip-Bu Tan’s name that suddenly appeared in the press releases announcing the new Interim CEO.
(more…)
Tags: Alberto Sangiovanni-Vincentelli, Cadence, Chenming Hu, Denali, ESD Alliance, Forte, Jasper, John Shoven, Lip-bu Tan, Moore's Law, Sigrity, Stanford, Tensilica, UC Berkeley, Walden International
No Comments »
Thursday, October 26th, 2017
Dr. Philippe Faes and Dr. Hendrick Eeckhaut together founded Sigasi in 2008. Since that time, Belgium-based Sigasi has accomplished the impossible: Taking the best elements of software design and applying them to hardware design. The Sigasi Studio IDE takes the type of feature-rich development environment that facilitates software design and redefines it for hardware design.
Early one morning last week, I spoke by phone with Hendrick Eekhaut, who serves as CTO at Sigasi. He was in Belgium, I was in California. After our conversation, he headed out to dinner; I headed in for breakfast.
(more…)
Tags: DAC, DVCon, Eclipse, EDA, Emacs, ESD Alliance, Ghent, Hardware design, Hendrik Eeckhaut, Philippe Faes, Sigasi, Sigasi Studio, SystemVerilog, Verilog, VHDL
No Comments »
Thursday, October 5th, 2017
Taking guidance from their website, Silicon Valley based Helic provides “EDA software that mitigates the risk of electromagnetic crosstalk in high-speed and low-power SOC designs.”
The company’s products include VeloceRF, an inductive device compiler and modeling tool which provides DRC clean devices for geometries as low as 10 nanometers; RaptorX, a pre-LVS electromagnetic modeling tool; and Exalto, a post-LVS RLCk extraction tool that captures unknown crosstalk including electrical, magnetic, and substrate coupling.
In other words, Helic is a company with a very technical portfolio of products, which can be daunting if one wants to speak with the leadership.
But that was not the real problem posed during my recent conversation with Helic President and CEO Yorgos Koutsoyannopoulos. The last time the two of us spoke, he made a bet I could not pronounce his name correctly. I won that bet, although Koutsoyannopoulos then proceeded to pronounce my name correctly as well, something that fewer than 1-in-10 in EDA can actually do.
Alas during our recent conversation – the one documented below – the Helic CEO could still pronounce my last name correctly, but I stumbled over his.
In my defense, Koutsoyannopoulus has 16 letters, 56% of which are vowels, and I hadn’t practiced in advance of our call. My last name only has 8 letters, but 63% of them are vowels, so mine is actually more difficult to pronounce. I should not have let Yorgos best me in this contest. Next time I will be better prepared.
(more…)
Tags: Ansys, Bob Smith, electromagnetic crosstalk, ESD Alliance, finFET, Helic, TSMC, Yorgos Koutsoyannopoulus
No Comments »
Thursday, September 28th, 2017
Vic Kulkarni is well-known in the EDA community as co-Founder, CEO and President of Sequence Design from 1995 until the company merged with Apache in 2009, which in turn was acquired by ANSYS in 2011. Kulkarni is now VP and Chief Strategist in the Office of CTO for the Semiconductor Business Unit at ANSYS.
There is little Kulkarni has not seen in his 30+ years in Silicon Valley. Although our conversation here mostly highlights current successes at ANSYS, it’s clear he continues to be wildly enthused about the broader promises of technology and the exciting efforts underway to create tools and strategies to bring those promises to fruition. Vik Kulkarni’s enthusiasm is the kind of thing that continues to make this industry so vibrant, and makes careers herein appealing for the next generation of engineers.
(more…)
Tags: Aart de Geus, Ansys, Apache, ARM, Bollywood, Cadence, DAC, ESD Alliance, John Lee, Lip-bu Tan, Mentor Graphics, Moore's Law, More than Moore, NVIDIA, Sequence Design, Synopsys, TSMC, Vik Kulkarni, Wally Rhines
No Comments »
Thursday, September 21st, 2017
Silicon Valley based Blue Pearl Software is the quintessential EDA company: privately held, run by a seasoned team of EDA experts, and with a portfolio that includes tools for generating timing constraints, CDC analysis, both synchronous and asynchronous, RTL verification tools for methodology standards and design rules, and design management tools.
Similarly, Blue Pearl’s Ellis Smith is the quintessential CEO in EDA. Before founding his current company, Smith was CEO and President of Orora Design Technologies, CEO at TransEDA through that company’s IPO in 2000, and CEO at Exemplar Logic through its merger with Mentor Graphics in 1995. His experience also includes a stint as CEO at CrossCheck Technology, and years spent at Duet Technologies, CADAM, Versatec, Dictaphone, and 3M. Pretty much the whole history of the EDA industry in one CV.
It would be an excellent idea to sit down for a very long conversation with Ellis Smith to discuss his take on the history of this oh-so-interesting industry. Unfortunately, time was of the essence when I did get the chance to talk with him earlier this month, and the focus was principally on Blue Pearl.
(more…)
Tags: Altera, Blue Pearl Software, Cadence, ESD Alliance, Mentor, MicroSemi, Synopsys, Xilinx
No Comments »
Thursday, September 14th, 2017
Prakash Narain is a long-standing member of the EDA community, having helped found Real Intent in 1999. In August 2016, I interviewed Dr. Narain at length about the technology at the core of the company. This week we spoke again, starting with an update of the company’s announcements around DAC in June, which involve further advancements in clock-domain crossing analysis and sign-off.
Real Intent must be doing something right, because Narain seems as enthused about the prospects for his company as someone who has just launched a tech start-up. It takes stamina and courage to sustain that optimism, and market success. Narain says his organization has both.
(more…)
Tags: Accellera, ESD Alliance, IEEE, Prakash Narain, Real Intent
No Comments »
Thursday, September 7th, 2017
John Kibarian has been involved with PDF Solutions since co-founding the company in 1991 in Pittsburgh, through its relocation to California in 1996, through the IPO in 2001, and on into today. He’s been CEO since 2000. PDF Co-founder Kimon Michaels has also been with the company since the beginning, and currently serves as VP of Products and Solutions.
As well, CMU Professor Andrzej Strojwas [2016 Phil Kaufman Award recipient] has been PDF’s Chief Technical Advisor from the beginning — not surprising considering he served as Kibarian’s PhD thesis adviser at CMU — and Lucio Lanza has been on the board of directors for 20 years, serving as Chairman since 2004.
PDF is a company that defines stability, steady growth, and an intellectually rigorous and serious-minded approach to solving problems. It’s not a company of self-promoters or grand-standers. It’s a company of highly accomplished technologists, deeply involved in one of the toughest jobs in semiconductors: Finding out why chip yields are good, bad or ugly, and figuring out how that data might be used to improve design and manufacturing.
The last time I interviewed John Kibarian, it was 2015 and PDF Solutions had just acquired Syntricity a company with yield-improvement technology and services for the IC process life cycle.
This time when Kibarian and I spoke, PDF had just acquired several assets of Kinesys Software, including its ALPS (Assembly Line Production Supervisor) software, “designed to enable complete manufacturing traceability, including individual devices and substrates, through the entire assembly and packaging processes” – capabilities which PDF plans to integrate with their Exensio big data analytics platform.
(more…)
Tags: Andrzej Strojwas, Coventor, Design for Inspection, EDAC, ESD Alliance, John Kibarian, Kathryn Kranen, Kimon Michaels, Kinesys Software, LAM, Lucio Lanza, Moore's Law, PDF Solutions
No Comments »
Thursday, August 31st, 2017
Amit Gupta is the quintessential entrepreneur in EDA. Even as he was graduating with degrees in EE and CS from University of Saskatchewan, he was co-founding Analog Design Automation, targeted at those who need tools to automate analog chip design. That was in 1999. The company was sold to Synopsys in 2004, and then Gupta co-founded Solido Design Automation in 2005.
This week, I had a chance to speak at length with Amit Gupta. The last time we conversed, it was at the January 2017 Kaufman Award dinner for Dr. Andres Strojwas in San Jose. That evening, Gupta was enthused about Solido’s access to high-quality engineering talent in Canada, and argued that the cost of living and quality of life in Saskatoon, where Solido is headquartered, more than compensate for any sense that Silicon Valley is the epicenter of the industry. His enthusiasm has only grown since that time.
(more…)
Tags: Amit Gupta, Analog Design Automation, Deloitte, Design Automation Conference, E3 Data Science, Eric Hall, ESD Alliance, finFET, GlobalFoundries, Gloria Nichols, Jeff Dyck, Mark Gilbert, NVIDIA, Qualcomm, Samsung, Saskatoon, SOI, Solido Design Automation, Sorin Dobre, Synopsys, Ting Ku, TSMC, UX design
No Comments »
|
