Open side-bar Menu
 Guest Blogger
Sanjay Gangal
Sanjay Gangal
Sanjay Gangal is a veteran of Electronics Design industry with over 25 years experience. He has previously worked at Mentor Graphics, Meta Software and Sun Microsystems. He has been contributing to EDACafe since 1999.

IDEAS Online Technical Conference Features Intel, Qualcomm, Nvidia, IBM, Samsung, Dishing on Their Chip Design Experiences

 
December 1st, 2022 by Sanjay Gangal

Ansys is hosting IDEAS Digital Forum 2022, a premier virtual event bringing together industry executives and technical design experts to discuss the latest in EDA for Semiconductors, Electronics, and Photonics.

See the full online conference agenda and list of speakers here. No cost registration allows you to attend the event on December 6th or on-demand at your convenience.

IDEAS kicks off with Keynote addresses from Intel’s Raja Koduri, Qualcomm’s Pankaj Kukkal, and surprising insights into the metaverse from DP Prakash with start-up Youtopian.

Keynote Speakers and Panelists at IDEAS on December 6th, 2022

You can also attend the IDEAS Panel Discussion in the afternoon entitled “Thermal Management: How to Keep Your Cool When Chips Get Hot. The Ed Sperling moderated panel discussion features Jean-Philippe Fricker from Cerebras, Roopashree HM from Texas Instruments, and Bill Mullen, senior director of R&D at Ansys.

8 technical tracks follow the Keynotes spanning Thermal Integrity, Power Integrity, Timing Closure, Electromagnetics, Machine Learning, Hardware Security, and Photonics. Over 30 technical presentations by real design engineers address case studies of their semiconductor, electronic, and optical designs from companies including:

Intel
Samsung
GUC
Qualcomm
MediaTek
HP Enterprise
Nvidia
IBM
NXP

Select authors will be available for Q&A chat with the event attendees after their presentations – don’t miss this opportunity to interact with industry experts.

To see the full agenda, Register now for IDEAS to add this premier event to your calendar.

Register now

COM-HPC Mini standard and COM-HPC FuSa extension

 
October 28th, 2022 by Sanjay Gangal

Interview with Christian Eder, Director Product Marketing at congatec and Chairman of the COM‑HPC Workgroup of PICMG

The PICMG presented the new COM-HPC Mini standard at the recent embedded world trade show. What features does this latest expansion of high-performance computing module standards offer?

Christian: The most significant innovation is that there is now a high-end form factor for credit-card-sized Computer-on-Modules. Like all other COM-HPC module standards, it is positioned above the performance classes targeted by COM Express. So, as far as credit-card-sized modules are concerned, it is positioned above COM Express Mini. The new COM-HPC connector supports transfer rates of more than 32 Gbit/s, which means that it fully covers PCIe Gen 4 and Gen 5, and probably even Gen 6. The interface selection includes a plan for 16 such PCIe lanes, in addition to three graphics interfaces and various fast USB 3.2 or USB 4.0 interfaces. That packs extremely high performance into such a small computing module.

The third generation of credit-card-sized modules is coming: Despite their small dimensions – 95 x 60 mm, according to the current plan – COM-HPC Client modules in Mini format will offer a comprehensive set of interfaces. On the roadmap are, among others, 16x PCIe, 3x graphics and several USB4 interfaces.

 

Read the rest of COM-HPC Mini standard and COM-HPC FuSa extension

Calling All Data Scientists!

 
May 16th, 2022 by Harry Foster

McKinsey, in a December 2021 AI survey, came up with a few conclusions that are worth paying attention to: 1) Nearly two- thirds of the respondents said that their companies’ investments in AI will continue to increase over the next three years 2) Over 64% also run their AI workloads on public or hybrid cloud.

DAC, for the very first time, is offering a unique hands-on workshop for Data Scientists. In this workshop offered by Catalit, Data Scientists (and aspiring Data Scientists) will learn how to formulate, train and improve ML models, by using both classic and deep learning algorithms.
Read the rest of Calling All Data Scientists!

Welcome to the first Hybrid DAC! So, what is it?

 
August 30th, 2021 by Harry Foster

This year we are experiencing many first with respect to planning the 58th Design Automation Conference. It’s the first DAC to be rescheduled from its normal summer schedule to December. It’s the first DAC to co-locate with both the RISC-V Summit and SEMICON West. And it is the first DAC to ever go hybrid with both a live and virtual component.

For this year’s Hybrid DAC, we incorporated many lessons learned from last year’s purely virtual DAC. The first lesson learned was that it is not possible to recreate the full experience of a live conference in a virtual world. Indeed, conferences such as DAC attract a global audience, and accommodating multiple time zones must be carefully factored into the plan. In addition, not every activity at a live conference translates into a good virtual experience. So, we learned the importance of providing a good digital journey through a conference by focusing on high-quality technical content.

Read the rest of Welcome to the first Hybrid DAC! So, what is it?

The 58th DAC online program is now live—and worth the wait!

 
August 7th, 2021 by Harry Foster

We did it! After over a year’s worth of hard work the DAC Executive Committee finally released the 58th DAC program! And in spite of a mountain of challenges and hurdles we encountered along the way this past year I couldn’t be prouder of the entire team involved in this major milestone.

We started planning the 58th DAC a little over a year ago, and we were confronted with a lot of uncertainty on what to expect for the coming year. Would submissions be down? Would we be able to find inspiring technical speakers to participate in a live event? But we did it!

Read the rest of The 58th DAC online program is now live—and worth the wait!

#DAC58, 2: Countdown to the Designer, IP and Embedded Track Submission Deadline for DAC 2021

 
December 4th, 2020 by Ambar Sarkar

The Designer and IP tracks have been a vital part of the DAC program since 2010, and I am honored to chair the Designer, IP and Embedded tracks for the 58th DAC. The Embedded track was added to the program last year to highlight this growing topic area in the design community.

Putting on DAC is a huge undertaking, and much of the work involved is done by volunteers from industry and academia. Each track contains submitted work as well as special invited sessions. The Designer, IP and Embedded tracks are co-chaired by Natarajan Viswanathan of Cadence Design, Monica Farkash of AMD, Randy Fish of Synopsys and Mark Kraeling of GE Transportation. Each track also has its own subcommittees to review and plan the year’s program. You can see who’s who on the DAC Executive Committee here.
Read the rest of #DAC58, 2: Countdown to the Designer, IP and Embedded Track Submission Deadline for DAC 2021

#58DAC, #1: Building a Great Conference with a Strong Foundation

 
October 19th, 2020 by Harry Foster

Typically, people use the phrase “Rome wasn’t built in a day” to remind others that time is required to create something truly great. Now, what does this have to do with the Design Automation Conference? While it might seem like we held the 57th DAC just a few weeks ago, time doesn’t stand still. In fact, the 58th DAC team began laying bricks for next year’s event by holding its first kickoff meeting only three weeks after completing this year’s virtual event. And for the 58th DAC, I am truly honored to serve as General Chair. This is a big pair of shoes to fill when you consider the amazing 57 chairs who served before me.

Read the rest of #58DAC, #1: Building a Great Conference with a Strong Foundation

Make an Impact and Get Involved in Standards Development and Evolution

 
March 12th, 2020 by Lu Dai

Semiconductor design and verification professionals use a variety of languages to model and verify their new ideas in this exciting era of 5G, AI, IoT and autonomous vehicles. Taking a step back, it’s important to understand where these design and verification languages came from, because in the early days of IC and system design there were multiple proprietary languages in circulation. Consider some of the following early languages and simulators used to describe and simulate IC designs:

  • Tegas Design Language (Tegas, 1972)
  • ABEL (Data I/O, 1983)
  • MOSSIM (California Institute of Technology, 1984)
  • Verilog (Gateway Design Automation, 1985)
  • LSim (Silicon Design Labs, 1986)
  • COSMOS (1987)
  • IRSIM (1989)
  • TRANALYZE (1991)

Starting in the 1980s, we began to see two simulation languages take hold commercially: VHDL and Verilog. As the industry adopted standard languages, the task of moving your ASIC design from one foundry to another became much easier, especially as logic synthesis tools like Design Compiler from Synopsys were gradually adopted.

Read the rest of Make an Impact and Get Involved in Standards Development and Evolution

DVCon U.S. – The Industry’s Must-Attend Design and Verification Conference

 
January 30th, 2020 by Aparna Dey

The DVCon U.S. 2020 conference and exhibition promises to provide the attendees with outstanding technical sessions and discussions on many hot topics, practical learning, networking and an opportunity to preview the latest industry design and verification tools and services from the best in the industry.  We are proud of continuing our tradition of providing an annual technical forum that serves the needs of the design and verification community, organized by dedicated volunteers from the community itself.

Now in its 32nd year, DVCon U.S. has established itself as the must-attend industry and user-focused conference for practicing design and verification engineers, EDA developers and design managers, focusing on design and verification of electronic systems and integrated circuits. We are proud that this conference attracts wide participation from the industry from the smaller to the larger companies in the full program and exhibition. We are also pleased that the success of DVCon U.S. and its format has spawned successful local DVCon events worldwide in Europe, China and India to meet the local needs of these regions.
Read the rest of DVCon U.S. – The Industry’s Must-Attend Design and Verification Conference

SEMI has a Vision …

 
July 2nd, 2019 by Dave Anderson

Over the past several years, SEMI took significant steps on the path to fulfilling its vision to address the entire electronic product chain from design through manufacturing. We’re a step closer to fulfilling this vision as ES Design West debuts next week (July 9-11) as a co-located SEMICON West event at San Francisco’s Moscone Center South Hall.

ES Design West is currently the only North American event to address commercial achievements of the electronic system and semiconductor design and forward-looking, system-centric design approaches. It will promote and highlight how the technology is being applied across the electronic product design, manufacturing and supply chain. 
Read the rest of SEMI has a Vision …




© 2024 Internet Business Systems, Inc.
670 Aberdeen Way, Milpitas, CA 95035
+1 (408) 882-6554 — Contact Us, or visit our other sites:
TechJobsCafe - Technical Jobs and Resumes EDACafe - Electronic Design Automation GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise