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 Guest Blogger
Sanjay Gangal
Sanjay Gangal
Sanjay Gangal is a veteran of Electronics Design industry with over 25 years experience. He has previously worked at Mentor Graphics, Meta Software and Sun Microsystems. He has been contributing to EDACafe since 1999.

EDACafe Industry Predictions for 2023 – VSORA

 
January 17th, 2023 by Sanjay Gangal

By Khaled Maalej, CEO, VSORA

Semiconductor Industry Innovation Steams Ahead in 2023

Khalid Maalej

Due to a combination of events, the technology equity market suffered a steep drop in 2022. Some of those events were unrelated, including the COVID pandemic and the war in Ukraine. Others were triggered by policy decisions such as containment of China by the U.S. that disrupted the semiconductor supply chain and unbalanced the production of chips.

While I think the technology stock market hit bottom, predicting the market for the year ahead is like reading the future from tea leaves. Still, early signs indicate that the Chip Act approved by the U.S. congress and signed into law by President Biden is prompting the private industry to invest heavily in semiconductors. One obvious example is the construction of new fabs in U.S. and Europe. All considered, I predict that the stock market in 2023 will see an inversion and begin to rise again, more likely in the second half of the year.

Read the rest of EDACafe Industry Predictions for 2023 – VSORA

Changes Post-Pandemic to the Semiconductor Industry in 2023 – ESD Alliance

 
January 13th, 2023 by Sanjay Gangal

By Bob Smith, Executive Director, ESD Alliance

Bob Smith

2023 promises to accelerate the changes already occurring in the post-pandemic semiconductor industry. Much of this is being driven by the shakeup of the global supply chain due to supply shortages and geo-political issues. As a result, many regions and countries are now committed to investing in their own domestic semiconductor capabilities.

The U.S. CHIPS Act, for example, should begin to roll out in 2023 to help accelerate innovation and manufacturing capability in the U.S. This is in addition to the private investments being made by leading semiconductor manufacturers to build significant new factories in the U.S. This represents a fundamental shift in thinking from the status quo of reliance on overseas manufacturing and offshore design centers.

As of 2021, the U.S. remains dominant in semiconductor design, but there are growing concerns that this may not be sustainable. Underlying both the investments being made in building domestic manufacturing plants and maintaining or increasing design activity is the critical need for building a workforce to support these activities.

Read the rest of Changes Post-Pandemic to the Semiconductor Industry in 2023 – ESD Alliance

EDACafe Industry Predictions 2023 – Verific

 
January 9th, 2023 by Sanjay Gangal

By Michiel Ligthart, President and COO, Verific Design Automation

2023 Will be the Year of Bespoke EDA

Michiel Ligthart 

If 2022 was the year of bespoke silicon, formerly known as custom silicon, then it naturally follows that 2023 will be the year of bespoke EDA (electronic design automation). And like bespoke silicon, bespoke EDA is not a one size fits all methodology.

Bespoke silicon relies on bespoke EDA, a fine-tuned and tailored design flow that starts at the register transfer level (RTL) where tweaks can be made to improve the quality of a bespoken silicon design. Enhancing the flow at design entry and in-house EDA tools using domain knowledge is attractive to engineering groups because it offers them the ability to support a wide varieties of design styles as well as standards such as SystemVerilog, VHDL, UVM, UPF, and encryption. Without standards to move design content through different EDA tools, bespoke EDA would be impractical and impossible to implement. One productive advantage of bespoke EDA: Engineers need only one API for SystemVerilog and VHDL thanks to its building blocks.

Examples of bespoke EDA implementations are elusive, even though it’s common knowledge that silicon design teams are popularizing it. Then again, it’s a competitive distinction not shared outside of silicon design groups. Some educated guesses could be low-power design, design for test circuitry, intellectual property (IP) customization, and debug functionality.

Read the rest of EDACafe Industry Predictions 2023 – Verific

EDACafe Industry Predictions for 2023 – Synopsys

 
January 6th, 2023 by Sanjay Gangal

By Sanjay Bali, VP of Strategy and Product Management, Synopsys EDA Group

2022 was a big year for the electronics industry. From the continued growth of AI (both in end devices and in chip design itself) to the emergence of more ways to design in the cloud, the level of innovation we saw was impressive. And it was necessary, as we experienced how complex semiconductors have become, with engineers striving to meet the progressively challenging task of optimizing power, performance, and area (PPA) in chips with as many as trillions of transistors.

In addition to systemic and scale complexity, a variety of other challenges were laid bare, from cyclical swings in product demand to a shrinking pool of engineering talent to the growing impact of all this energy consumption on our planet. Given this backdrop, what might 2023 bring to this increasingly vital industry?

For decades we have seen how engineering ingenuity has persevered to extend Moore’s law and extract more computing power from a single chip—in spite of the limitations of physics. To create products like autonomous cars and advanced robotics. Ahead of us, we see the market demanding more sophisticated features from chip technologies that power our world.

In 2023, we can expect to see these trends continue to unfold, with a few emerging technologies taking hold to further shape the industry. Read on to learn about three key technologies that are poised to transform electronic design.

Read the rest of EDACafe Industry Predictions for 2023 – Synopsys

EDACafe Industry Predictions for 2023 – KDPOF

 
January 5th, 2023 by Sanjay Gangal

By Carlos Pardo CEO and Co-founder of KDPOF

What’s the outlook for multi-gigabit networking in vehicles? The year 2023 will lay the foundation for optical in-vehicle data communications with the IEEE Standards Association’s publication of the IEEE 802.3 automotive optical multi-gigabit standard, announced for early 2023. The proposed IEEE 802.3 automotive optical multi-gigabit standard draft specifies 2.5GBASE-AU, 5GBASE-AU, 10GBASE-AU, 25GBASE-AU, and 50GBASE-AU using bend-insensitive OM3 glass fiber. The OM3 class has been chosen because it’s already extensively used in data centers with applications in more stressful applications like avionics. The draft standard optical specifications will allow the use of reliable light sources based on proven technology. Cameras, displays, and sensors located throughout a vehicle typically connect to various electronic control units. These control units optimize operation of the vehicle power train or provide the navigation and entertainment features included in vehicles and have been included as test cases for standardization. The multi-gigabit capabilities the draft standard specifies will also be critical for the continued evolution of driver-assist and ultimately autonomous vehicle operation. The first prototypes for proof of concept will be available in the third quarter 2023.

Read the rest of EDACafe Industry Predictions for 2023 – KDPOF

LoRaWAN No Longer Just for Early Adopters

 
January 4th, 2023 by Sanjay Gangal

Donna Moore, CEO and Chairwoman, LoRa Alliance

By Donna Moore, CEO and Chairwoman, LoRa Alliance

2022 was truly a transformative year for IoT, yielding major shifts in perception and execution, and surpassing milestones of massive deployments. At the LoRa Alliance, our experience was that people moved away from asking about “what” LoRaWAN is, to asking about “how” to deploy, how to find devices, how to partner, how to achieve ROI. IoT clearly has moved into a new stage of mass adoption.

The execution and results of LoRaWAN proof of concepts (PoCs) provide evidence of this market shift. Previously, deploying a PoC took an average of 12 to 18 months. Now, it averages about 6 months. Even better, the ROI on LoRaWAN projects is usually higher than what was originally estimated. Organizations that complete these PoCs quickly realize that the fastest way to compound value is to add new use cases and optimize their operations to benefit from the efficiencies that the solution is providing.

The tremendous headwinds over the past few years—Covid-19, climate change, flooding, fires, droughts, labor shortages, inflation, supply chain constraints—became tailwinds for LoRaWAN technology. In response to the world’s struggle to maintain systems and processes that support daily life, LoRaWAN was deployed to alleviate the problems. LoRaWAN is now used to monitor air and food quality; water quality and availability; infrastructure; and safety, security and health, and much more. While supporting people and the planet, LoRaWAN drives efficiencies that promote business growth and financial stability, making it the leading IoT connectivity solution.

So, what does 2023 hold? The fact is that the world continues to face a growing list of challenges. A major focus in 2023 will be improving infrastructure – buildings, utilities and cities need to find solutions to enhance and improve existing systems that are too expensive to replace outright. When business and governments plan their solutions, they will choose LPWAN IoT and there is huge opportunity for LoRaWAN because of the considerable ROI it generates.

Read the rest of LoRaWAN No Longer Just for Early Adopters

IDEAS Online Technical Conference Features Intel, Qualcomm, Nvidia, IBM, Samsung, Dishing on Their Chip Design Experiences

 
December 1st, 2022 by Sanjay Gangal

Ansys is hosting IDEAS Digital Forum 2022, a premier virtual event bringing together industry executives and technical design experts to discuss the latest in EDA for Semiconductors, Electronics, and Photonics.

See the full online conference agenda and list of speakers here. No cost registration allows you to attend the event on December 6th or on-demand at your convenience.

IDEAS kicks off with Keynote addresses from Intel’s Raja Koduri, Qualcomm’s Pankaj Kukkal, and surprising insights into the metaverse from DP Prakash with start-up Youtopian.

Keynote Speakers and Panelists at IDEAS on December 6th, 2022

You can also attend the IDEAS Panel Discussion in the afternoon entitled “Thermal Management: How to Keep Your Cool When Chips Get Hot. The Ed Sperling moderated panel discussion features Jean-Philippe Fricker from Cerebras, Roopashree HM from Texas Instruments, and Bill Mullen, senior director of R&D at Ansys.

8 technical tracks follow the Keynotes spanning Thermal Integrity, Power Integrity, Timing Closure, Electromagnetics, Machine Learning, Hardware Security, and Photonics. Over 30 technical presentations by real design engineers address case studies of their semiconductor, electronic, and optical designs from companies including:

Intel
Samsung
GUC
Qualcomm
MediaTek
HP Enterprise
Nvidia
IBM
NXP

Select authors will be available for Q&A chat with the event attendees after their presentations – don’t miss this opportunity to interact with industry experts.

To see the full agenda, Register now for IDEAS to add this premier event to your calendar.

Register now

COM-HPC Mini standard and COM-HPC FuSa extension

 
October 28th, 2022 by Sanjay Gangal

Interview with Christian Eder, Director Product Marketing at congatec and Chairman of the COM‑HPC Workgroup of PICMG

The PICMG presented the new COM-HPC Mini standard at the recent embedded world trade show. What features does this latest expansion of high-performance computing module standards offer?

Christian: The most significant innovation is that there is now a high-end form factor for credit-card-sized Computer-on-Modules. Like all other COM-HPC module standards, it is positioned above the performance classes targeted by COM Express. So, as far as credit-card-sized modules are concerned, it is positioned above COM Express Mini. The new COM-HPC connector supports transfer rates of more than 32 Gbit/s, which means that it fully covers PCIe Gen 4 and Gen 5, and probably even Gen 6. The interface selection includes a plan for 16 such PCIe lanes, in addition to three graphics interfaces and various fast USB 3.2 or USB 4.0 interfaces. That packs extremely high performance into such a small computing module.

The third generation of credit-card-sized modules is coming: Despite their small dimensions – 95 x 60 mm, according to the current plan – COM-HPC Client modules in Mini format will offer a comprehensive set of interfaces. On the roadmap are, among others, 16x PCIe, 3x graphics and several USB4 interfaces.

 

Read the rest of COM-HPC Mini standard and COM-HPC FuSa extension

Calling All Data Scientists!

 
May 16th, 2022 by Harry Foster

McKinsey, in a December 2021 AI survey, came up with a few conclusions that are worth paying attention to: 1) Nearly two- thirds of the respondents said that their companies’ investments in AI will continue to increase over the next three years 2) Over 64% also run their AI workloads on public or hybrid cloud.

DAC, for the very first time, is offering a unique hands-on workshop for Data Scientists. In this workshop offered by Catalit, Data Scientists (and aspiring Data Scientists) will learn how to formulate, train and improve ML models, by using both classic and deep learning algorithms.
Read the rest of Calling All Data Scientists!

Welcome to the first Hybrid DAC! So, what is it?

 
August 30th, 2021 by Harry Foster

This year we are experiencing many first with respect to planning the 58th Design Automation Conference. It’s the first DAC to be rescheduled from its normal summer schedule to December. It’s the first DAC to co-locate with both the RISC-V Summit and SEMICON West. And it is the first DAC to ever go hybrid with both a live and virtual component.

For this year’s Hybrid DAC, we incorporated many lessons learned from last year’s purely virtual DAC. The first lesson learned was that it is not possible to recreate the full experience of a live conference in a virtual world. Indeed, conferences such as DAC attract a global audience, and accommodating multiple time zones must be carefully factored into the plan. In addition, not every activity at a live conference translates into a good virtual experience. So, we learned the importance of providing a good digital journey through a conference by focusing on high-quality technical content.

Read the rest of Welcome to the first Hybrid DAC! So, what is it?




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