Posts Tagged ‘www.leepr.com’
Wednesday, July 30th, 2014
More on our coverage of the panel on the IoT……Audience member, Gabe Moretti, had quite a bit to say about the IoT and the automobile. And Jim Hogan shares a story.
 Moretti: Let me talk to you about the very latest model car….The first thing it does when I get in the car is ask me for my cell phone. It connects to my cell phone, and only some of the functions are available to me if I have the cell phone with me…and the cell phone is off. What’s the problem I have with all of us engineers talking about what a great opportunity IoT is? We’re forgetting that supply is only successful if there is a demand.
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Tags: automobiles, Chip Design, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, Gabe Moretti, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, semiconductors, smart cars, SoC, System on Chip, www.leepr.com
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Monday, July 28th, 2014
In our continuing series on the IoT, Frank Schirrmeister of Cadence explains what three components of the IoT are important to him.
 Schirrmeister: There are three components of importance. Fitbit. ARM’s going very big in that area, with their silicon partners. That’s not the IoT in its completeness. That’s an important component, but the analog mixed-signal components are certainly fun and challenging in this domain.
Then there are two more pieces to the Internet of Things that make me very happy, from a system design perspective: The first one is the hub of my data from the Fitbit. I have at least four hubs that I’m concerned about. My cell phone when I’m mobile. My computer at home. My living room; apparently my TV knows about my habits.
And there is my car. So that’s a hub – a very important piece. And from a system design perspective, there’s system development, emulation, FPGA, virtualization. There is a huge interesting market for us.
Then the third piece is this whole cloud space. That’s where the Intel, ARM, PC battle is waging. And that’s also a very important component of the Internet of Things where all the data crunching has happened and the health data that the health monitor needs to pick up. It is a very attractive market for EDA and will be very important to drive requirements, as well, for us.
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Tags: 51DAC, Cadence, Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, Semiconductor IP, semiconductors, SoC, System on Chip, www.leepr.com
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Thursday, July 24th, 2014
Bernard Murphy, CTO of Atrenta, talks about the challenges to security that the IoT will bring in our continuing coverage of the IoT panel at DAC…and sees the IoT as a lot like a biological system!!!!
 Murphy: The IoT represents a new level of challenge for security – not just because you have to worry about automotive, medical and so on. But also, if you believe the numbers, then the number of potential edge nodes in an IoT is on the order of a trillion or more. That’s two to three orders of magnitude bigger than any existing network you can imagine. It’s about the number of cells you find in a new born baby.
So a trillion edge nodes looks like a biological system. Why is that relevant? Because our approach to security today is very atomic….It’s not a system level approach. You think in terms of system level and you look at analogies with biological systems, then you think in terms of different things.
Of course, you need all the antibodies and antiviruses. But you also want to think about things like signaling – help I’m under attack. It’s not the same thing as defending yourself. You still want to defend. But you also want to signal to your nearest neighbors or an organization around you that you’re under attack. It can isolate you or send in defenses.
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Tags: 51DAC, Atrenta, Chip Design, DAC, Design Automation Conference, EDA, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, Security, semiconductors, SoC, System on Chip, www.leepr.com
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Tuesday, July 22nd, 2014
In today’s snippet from the IoT panel, Randy Smith, VP of Marketing at Sonics, gives his views on how the IoT will affect the EDA and IP industries.
Smith: Time to Market will be more important. The need for software-hardware co-design and speed will equal new applications and solutions for EDA.
A lot of it will be in consumer, which is why there is a lot of hype, because when we think consumer, we think high volumes, perhaps a trillion devices out there. But what’s different in that market as compared to some other markets is that time to market is so much more critical.
So for IoT, you’re going to need the equivalent of agile software development and hardware. You’re going to need to respin that design in three months. It would not be a tremendous surprise if you see some previous ASIC practices like gate arrays start to get more traction again.
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Tags: Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IP, Jim Hogan, Lee PR, Lee Public Relations, Randy Smith, Semiconductor IP, semiconductors, SoC, Sonics, System on Chip, www.leepr.com
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Monday, July 21st, 2014
As we had previously announced, venture capitalist Jim Hogan moderated a panel at DAC regarding the IoT.
 It was an eye opener about all things IoT……or maybe we should call it the IoE (The Internet of Everything), or as one prominent editor noted, the IoW (The Internet of Whatever). Our panelists included: Gary Smith, Market Analyst, GSEDA; Frank Schirrmeister, Group Director, System Development Suite, Cadence; Bernard Murphy, CTO, Atrenta; and Randy Smith, VP of Marketing, Sonics.
Very lively discussion among panelists, but also from the floor! Most notably editor Gabe Moretti of Chip Design and Simon Bloch of Samsung. Bloch, Sr. Director of R&D in mobile consumer wireless devices, posed questions and stimulated discussion to the point where he might be called the unannounced 6th panelist.
Over the next few blogposts, we’ll share snippets of that discussion. Gary Smith will start us off…..
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Tags: 51DAC, Atrenta, Bernard Murphy, Cadence, Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, Gary Smith, GSEDA, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, IP, Jim Hogan, Lee PR, Lee Public Relations, Randy Smith, semiconductors, SoC, Sonics, System on Chip, VC, Wall Street, www.leepr.com
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Tuesday, May 13th, 2014
Electronics360’s George Leopold explores SKTA Innopartners and their unique business incubator model in this article:
Technology Incubator 2.0 Seeks to Rebuild U.S. Chip Ecosystem
 Accelerator Model
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Tags: accelerators, Angel Orrantia, Chip Design, Electronics360, George Leopold, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, incubators, Innopartners, semiconductors, silicon valley, SK Telecom, SKTA, SKTA Innopartners, SoC, Steve Blank, VC, VC funding, Venture Capital, www.leepr.com
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Tuesday, May 6th, 2014
You’ve got problems with your design rule deck? See what Bryon Moyer and Peggy Aycinena have to say on how to fix those problems……
Testing Out the Rules by Bryon Moyer
Sage-DA: Automating rule checking by Peggy Aycinena
Come check out Sage-DA at Booth 1423 at the Design Automation Conference.
Lee PR does work for Sage-DA.
Tags: automatic rule checking, Chip Design, DAC, Design Automation Conference, DRC, DRC decks, EDA, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Sage Design Automation, Sage-DA, semiconductors, SoC, System on Chip, www.leepr.com
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Wednesday, April 30th, 2014
In a recent blog entry we asked Chris Rowen, Cadence Fellow and Tensilica Founder, to share with us what EDA and IP (as an industry) need to do in 2014 to serve its user base better. The following is a follow-up blog by Rowen explaining how.
System-design Evolution Follows the Data
When last we chatted in this forum, I responded to a question Ed Lee proposed to this as part of the Predictions 2014 series: What do EDA and IP (as an industry) need to do in 2014 to serve its user base better?
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Tags: Cadence, Chip Design, Chris Rowen, EDA, EDA & IP, EDA tools, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, IP blocks, IP vendors, microprocessor design, semiconductor design, Semiconductor IP, SoC, System on Chip, Tensilica, www.leepr.com
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Monday, March 17th, 2014
 RTL Signoff is certainly one of the hot topics in chip design circles lately, and one that is garnering great interest and concern. I chatted recently with Piyush Sancheti, VP of Marketing at Atrenta, on what it is, why it’s a design imperative, and how it should be done.
Liz: Piyush, thanks for taking the time out to chat with me today on this vital topic…RTL Signoff.
Piyush: No problem, Liz
Liz: So, to start out, what is RTL Signoff?
Piyush: “RTL Signoff” gained momentum as an established concept in 2013. While the concept is not new, a commonly-accepted definition did not exist in the past, which is now beginning to emerge. Here’s what I think RTL Signoff is: a comprehensive series of well-defined MUST-pass requirements for your RTL before you commit the design to downstream implementation such as synthesis and physical layout. In addition to this complete set of RTL Signoff requirements, you need tools and methodologies to meet the requirement, along with tangible metrics to measure your pass/fail criteria.
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Tags: Atrenta, Chip Design, EDA, EDA & IP, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Intellectual property, IP, Piyush Sancheti, register transfer level, RTL, RTL signoff, Semiconductor IP, semiconductors, SoC, System on Chip, www.leepr.com
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Sunday, March 16th, 2014
 Brian Fuller - editor in chief of the now-lamented EE Times during its best years - and I were talking about it being great that there are these predictions about where EDA/IP is going in 2014. Chris Rowen’s wrap up prediction talked about EDA’s need to move beyond component – level focus. Chris isn’t alone in this idea.
The question is: HOW will EDA/IP get beyond the component level and start looking at what’s beyond the 25-year EDA horizon and how EDA can and must add value.
Brian and I would love to hear what readers out there think…..
Does EDA & IP need to go beyond?
Where does it need to go?
And how will it get there?
Tags: Brian Fuller, Cadence, Chip Design, Chris Rowen, EDA, EDA & IP, EE Times, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Intellectual property, IP, Lee PR, Semiconductor IP, semiconductors, SoC, System on Chip, www.leepr.com
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Moretti: Let me talk to you about the very latest model car….The first thing it does when I get in the car is ask me for my cell phone. It connects to my cell phone, and only some of the functions are available to me if I have the cell phone with me…and the cell phone is off. What’s the problem I have with all of us engineers talking about what a great opportunity IoT is? We’re forgetting that supply is only successful if there is a demand.
