Posts Tagged ‘Frank Schirrmeister’
Monday, August 25th, 2014
The EDA editorial brain trust today is the topic of our continuing conversation with Richard Goering and Brian Fuller.
 Brian Fuller  Richard Goering
ED: What is the EDA editorial brain trust these days?
RICHARD: Not sure how you’re defining “brain trust,” but if there is one, it’s with the vendors and the independent on-line publications.
ED: Who makes up the EDA editorial brain trust?
RICHARD: If you add it all up, there are still a number of editors with deep EDA and semiconductor experience – they’re just no longer with print publications.
Additionally, there are now a number of writers and bloggers who didn’t start as journalists but who turned in that direction during the transition away from print.
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Tags: Brian Bailey, Brian Fuller, Cadence, Chip Design, Colin Walls, DAC, Dan Nenni, Design Automation Conference, EDA, EDA & IP, EE Times, Electronic Design Automation, Frank Schirrmeister, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Jerry Grzenia, John Cooley, John Day, Lee PR, Lee Public Relations, Michael Posner, Mike Santarini, Paul McLellan, Paul Rako, Peggy Aycinena, Richard Goering, Ron Wilson, Semiconductor Engineering, Semiconductor IP, SemiWiki, SoC, social media, System on Chip, Tom De Schutter, www.leepr.com
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Wednesday, July 30th, 2014
More on our coverage of the panel on the IoT……Audience member, Gabe Moretti, had quite a bit to say about the IoT and the automobile. And Jim Hogan shares a story.
 Moretti: Let me talk to you about the very latest model car….The first thing it does when I get in the car is ask me for my cell phone. It connects to my cell phone, and only some of the functions are available to me if I have the cell phone with me…and the cell phone is off. What’s the problem I have with all of us engineers talking about what a great opportunity IoT is? We’re forgetting that supply is only successful if there is a demand.
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Tags: automobiles, Chip Design, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, Gabe Moretti, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, semiconductors, smart cars, SoC, System on Chip, www.leepr.com
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Monday, July 28th, 2014
In our continuing series on the IoT, Frank Schirrmeister of Cadence explains what three components of the IoT are important to him.
 Schirrmeister: There are three components of importance. Fitbit. ARM’s going very big in that area, with their silicon partners. That’s not the IoT in its completeness. That’s an important component, but the analog mixed-signal components are certainly fun and challenging in this domain.
Then there are two more pieces to the Internet of Things that make me very happy, from a system design perspective: The first one is the hub of my data from the Fitbit. I have at least four hubs that I’m concerned about. My cell phone when I’m mobile. My computer at home. My living room; apparently my TV knows about my habits.
And there is my car. So that’s a hub – a very important piece. And from a system design perspective, there’s system development, emulation, FPGA, virtualization. There is a huge interesting market for us.
Then the third piece is this whole cloud space. That’s where the Intel, ARM, PC battle is waging. And that’s also a very important component of the Internet of Things where all the data crunching has happened and the health data that the health monitor needs to pick up. It is a very attractive market for EDA and will be very important to drive requirements, as well, for us.
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Tags: 51DAC, Cadence, Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, Semiconductor IP, semiconductors, SoC, System on Chip, www.leepr.com
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Monday, July 21st, 2014
As we had previously announced, venture capitalist Jim Hogan moderated a panel at DAC regarding the IoT.
 It was an eye opener about all things IoT……or maybe we should call it the IoE (The Internet of Everything), or as one prominent editor noted, the IoW (The Internet of Whatever). Our panelists included: Gary Smith, Market Analyst, GSEDA; Frank Schirrmeister, Group Director, System Development Suite, Cadence; Bernard Murphy, CTO, Atrenta; and Randy Smith, VP of Marketing, Sonics.
Very lively discussion among panelists, but also from the floor! Most notably editor Gabe Moretti of Chip Design and Simon Bloch of Samsung. Bloch, Sr. Director of R&D in mobile consumer wireless devices, posed questions and stimulated discussion to the point where he might be called the unannounced 6th panelist.
Over the next few blogposts, we’ll share snippets of that discussion. Gary Smith will start us off…..
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Tags: 51DAC, Atrenta, Bernard Murphy, Cadence, Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, Gary Smith, GSEDA, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, IP, Jim Hogan, Lee PR, Lee Public Relations, Randy Smith, semiconductors, SoC, Sonics, System on Chip, VC, Wall Street, www.leepr.com
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Tuesday, May 20th, 2014
As DAC frenzy hits us all, here’s an event that EDA/IP users and media people ought to consider attending.
It’s a Jim Hogan-moderated discussion event on
IoT system design concerns
Jim will 1) introduce the topic; 2) spur, moderate, provoke discussion and 3) sum up what we’ve learned during this session. Of course, this group of speakers are pretty opinionated and won’t need much provocation.
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Tags: Atrenta, Bernard Murphy, Cadence, Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, functional verification, Gary Smith, GSEDA, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, Randy Smith, register transfer level, RTL, semiconductors, SoC, Sonics, System on Chip
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Wednesday, March 12th, 2014
Software is beginning to take on a bigger role in the SoC design world. How do we get to SW-HW co-verification? This topic was the center of discussion at a private event last week co-located with DVCon. The event, hosted by Jim Hogan and sponsored by Vayavya Labs Pvt. Ltd., included a panel discussion with Frank Schirrmeister (Cadence), Tomas Evensen (Xilinx) and Parag Naik (Saankhya). George Lotridge of VMware and Michael Bair of Intel also gave presentations. Click here for the presentations. (more…)
Tags: Cadence, Chip Design, device driver, EDA, Electronic Design Automation, Frank Schirrmeister, George Lotridge, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Intel, Jim Hogan, Lee PR, Michael Bair, Parag Naik, Saankhya Labs, semiconductors, SoC, software, software-driven system-level verification, SW-HW co-verification, System on Chip, system-level verification, Tomas Evensen, Vayavya, VMware, www.leepr.com, Xilinx
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