Posts Tagged ‘Synopsys’
Thursday, March 23rd, 2017
Something historic and poignant is taking place on Thursday, April 6th, that should be of interest to absolutely everyone in the EDA and IP communities. The four most powerful men in these two industries will be on stage for an ESD Alliance panel discussion led by Semiconductor Engineering’s Ed Sperling.
The four panelists include Synopsys Chairman & CEO Aart de Geus, Cadence President & CEO Lip-Bu Tan, Mentor Graphics Chairman & CEO Wally Rhines, and ARM CEO Simon Segars.
The April 6th event will be historic because these Big Four unequivocally define EDA and IP – just as Stanford, Huntington, Hopkins, and Crocker defined Railroads in the West – and it’ll be poignant because you’ll never see them together again. Too many changes ahead.
Of course, the ESDA panel will also be whimsical: You’ll know no more about these CEOs and their companies at the end of the evening than you knew when you first arrived. That doesn’t mean the evening won’t be entertaining.
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Tags: Aart de Geus, Abu Dhabi, ARM, Brexit, Cadence, Charles Crocker, China, Collis P. Huntington, Ed Sperling, EDA, EDA 360, Egypt, ESD Allicance, Germany, GlobalFoundries, India, Japan, Leland Stanford, Lip-bu Tan, Mark Hopkins, Mentor Graphics, Pakistan, Russia, Saudia Arabia, Semiconductor Engineering, Siemens, Simon Segars, SoftBank, Synopsys, Taiwan, TSMC, U.S., UK, Wally Rhines
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Thursday, March 9th, 2017
This is a simple post with just two messages. First, EDA is hiring. All over the globe. Mentor Graphics lists over 200 openings, Cadence has almost 300 openings, and Synopsys has a staggering 900+ openings worldwide.
Of course, EDACafe’s own Mark Gilbert could have told you this. It wasn’t necessary to scour the websites of the Big Three in EDA to learn about the many jobs currently available in the industry, most for software developers, not surprisingly.
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Tags: Cadence, Larry Disenhof, Mark Gilbert, Mentor Graphics, Russia, Synopsys
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Thursday, January 19th, 2017
Synopsys is undergoing a massive reset. Where not so long ago, it self-identified as the largest EDA company in the world, other words are now used to describe the enterprise: “Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing.”
As compelling as that description may be, some observers are questioning whether the marked differences between maintaining expertise in chip design, verification, IP, and IP integration versus maintaining expertise in software integrity are too wide to make for easy co-habitation under one corporate roof.
Some would say putting EDA and chip design together with software security is not a good recipe for the long-term success of the company. But are these critics correct?
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Tags: Cigital, Codiscope, Coverity, Forcheck, SNPS, Synopsys
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Thursday, January 5th, 2017
IEEE’s CEDA and the ESD Alliance – with help from their friends at PDF Solutions, Cadence, Mentor, Synopsys and ACM SIGDA – will host a dinner on Thursday, January 26th, in honor of the 2016 Phil Kaufman Award recipient: Dr. Andrzej Strojwas, Keithley Professor of ECE at Carnegie Mellon and long-time CTO at PDF Solutions.
Unfortunately, the last several Kaufman Award dinners were such over-the-top events – the 2014 event in honor of Dr. Lucio Lanza awash in glamour and luminaries, and the 2015 event in honor of Dr. Walden Rhines replete with zany zeitgeist and a roast from Intel-legend Craig Barrett unparalleled in the annals of EDA history.
The organizers of this year’s event may, therefore, find it impossible to craft something anywhere close to the previous two dinners, if the metrics of energy and frenetic glad-handing are the only ones of importance.
Of course, these are not the only two metrics of importance and nothing is ever impossible in EDA or IP, so do not despair.
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Tags: 2016 Phil Kaufman Award, ACM Sigda, Cadence, Carnegie Mellon University, Dr. Andrzej J. Strojwas, ESD Alliance, IEEE CEDA, Mentor Graphics, PDF Solutions, Synopsys
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Wednesday, October 26th, 2016
Last week on Friday and Saturday, the IEEE Council on EDA hosted a 2-day workshop to discuss the future of design automation. Mentor Graphics provided the venue – a large conference room in their Fremont/Silicon Valley campus – and workshop leaders, UCSD Prof. Andrew Kahng, UCSD Prof. Farinaz Koushanfa, and Intel alum/CEDA President Shishpal Rawat provided the welcome.
Over the two days, a group of 50+ attendees – representing a wide cross-section of academics and industry experts – launched into conversations that were lively, energized, at times contentious, and completely engrossing. Put simply, there was no better place on the face of the globe on October 21st and 22nd where tech junkies were more intellectually challenged and entertained than at the Design Automation Futures Workshop in Fremont.
What made the workshop so compelling? For this, their inaugural DAFW, CEDA chose to address neuromorphic computing – the ultimate hotness related to machine learning, with a lot of promise for future applications. It doesn’t get any more design futures, or futuristic, than this.
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Tags: Andrew Kahng, DAFW 2016, Design Automation Futures Workshop, Farinaz Koushanfa, Google, IEEE CEDA, Intel, Machine Learning, Magma, Mentor Graphics, O-In Design Automation, Patrick Groeneveld, Richard Ho, Shishpal Rawat, Synopsys, The Rolling Stones, UC San Diego
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Thursday, October 13th, 2016
Congrats to the ESD Alliance for continuing to attend to myriad legal issues that surround the business of technology. On Tuesday, November 1st, the organization is hosting an evening panel on the Cadence campus entitled “Legal Steps to Maximize Your Exit Value.”
Vital topics slated for discussion include setting the proper price for intangible assets – in-house IP, strategic partnerships, and good will – and more prosaic issues such as the appropriate legal structures and pre-deal tax planning needed to help facilitate the acquisition. Most importantly, panel organizers are also promising you’ll learn “how to avoid giving it all back to your buyer later”.
Which is where our EDA M&A Hall of Fame comes in. There’s just no way this ESD Alliance panel can carry any weight with a battle-hardened EDA audience without the likes of Sanjay Srivastava, Rajeev Madhavan, Chris Rowen, and Kathryn Kranen sitting up at the front of the room.
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Tags: Cadence, Chris Rowen, Denali, Dennis Fernandez, ESD Alliance, Fudderman Dupree, Jasper Design Automation, Kathryn Kranen, Magma, Mark White, Neil Shroff, Orion Capital, Rajeev Madhavan, Sanjay Srivastava, Silvaco, Synopsys, Tensilica, Tom Maier, Warren Savage, White Summers Caffee & James
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Thursday, August 18th, 2016
As of August 17th, when they posted financial results for Q3_2016, Synopsys is reporting somewhere in the neighborhood of $1 billion in cash and cash equivalents. As prudent as it may be to save for a rainy day, here’s something a bit more creative the company could do with a portion of that cash: Buy OneSpin.
Why? Because OneSpin offers something that Synopsys doesn’t have – a market-leading position in formal verification. OneSpin would bring that to Synopsys, along with a strong, well-established track record and proven customer engagements across European, North American and Asian markets.
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Tags: Cadence, EVE, Jasper, Mentor, OneSpin, Palladium, Synopsys, Veloce
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Thursday, August 11th, 2016
It takes courage to re-launch an existing product rather than start from scratch, to announce a refreshed and updated offering as if it were something brand new. That’s certainly the case with Synopsys‘ recent release of TetraMAX II. It took courage to build on a franchise that first arrived on the scene not just in the last century, but in the last millennium.
And it was with this sentiment that Synopsys’ Robert Ruiz and I started a recent phone call to discuss the July news that TetraMAX II has arrived on the scene.
Ruiz began: “This is TetraMax II. We wrote the key engines from scratch, an effort that took the R&D team a full two years to complete. The goal was to get 10x faster and 25-percent fewer patterns.”
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Tags: ATPG, Atrenta, BIST, Robert Ruiz, SNUG, STMicro, Synopsys, TetraMAX II, Virage Logic
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Thursday, June 30th, 2016
Exuberance and Optimism: the only two words required to describe EDA-Careers’ Mark Gilbert – even after 20 years in the trenches sorting out the who what and where of just about everybody in the EDA industry. Yes, he self-identifies as the fun guy in the white suit, seen hither and yon wherever the EDA Nation chooses to confab, but in reality he’s the good guy in the white hat who’s going to tell it to you straight, about your career and your goals.
Also by his own description, Mark Gilbert is “the big fish in a little pond” who serves as the leading head hunter and career counselor extraordinaire of EDA.
I was lucky enough to speak with Gilbert by phone this week. As he and I were both on the East Coast, coordinating the hour of the call was easy. Our conversation started with the usual query: How did you get started in this business?
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Tags: Aart de Geus, Altera, ATopTech, Cadence, EDA, EDA-Careers, Mark Gilbert, Mentor Graphics, Synopsys, Wally Rhines
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Thursday, June 23rd, 2016
Michiel Ligthart, President and COO of Verific Design Automation, and Rick Carlson, VP of Worldwide Sales, have a proposal for young companies in the EDA industry and adjacent technologies: Come to Verific if your organization is early stage, in need of encouragement and wise counsel, and could benefit from access to Verific software to help you progress towards a commercial product launch.
In a recent phone call, Ligthart and Carlson explained the specifics of the Verific program, and delineated what it’s not: “We are not funding startups,” Ligthart said, “but we have changed our business model over the lifetime of our company to encourage innovation.
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Tags: Austemper, Cadence, Innergy Systems, Joe Costello, Mentor Graphics, NextOp, Oasys, Paul van Besouw, Rick Carlson, Sanjiv Kaul, Synopsys, Tortuga Logic, Verific Design Automation
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