Posts Tagged ‘Richard Goering’
Saturday, March 17th, 2012
A lot of ink is always spilled over the EDAC CEO Forecast Panel, and this year was no different.
Ed Sperling moderated the panel and had slides to facilitate. They’re available here on the EDAC website. The full video version of the event is now available, as well.
If you would rather read about it, Mike Demler transcribed the event, Paul McClellan encapsulated the event, Richard Goering observed the event, and Steve Leibson abstracted the event.
I was also there on February 29th in Santa Clara, but rather than re-invent the wheel and provide redundant commentary, I’ve taken my notes from the evening and used them to create a Word Cloud. [see below]
If you study it carefully, you’ll see it pretty much sums up the emphasis of the panel discussion: Synopsys’ Aart de Geus, Mentor’s Wally Rhines, Cadence’s Lip-bu Tan, ARM’s Simon Segars, and Gradient’s Ed Cheng in conversation with Ed Sperling, exchanging ideas about Different Problems in EDA: Tools, Power, IP, Memory, Integration, Systems, Hardware, Software, Money and Innovation.
Now let’s look at the Word Cloud without any of the names, just the issues that swirled about in the conversation on February 29th. (more…)
Tags: Aart de Geus, Ed Cheng, Ed Sperling, EDAC, Lip-bu Tan, Mike Demler, Paul McClellan, Richard Goering, Simon Segars, Steve Leibson, Wally Rhines No Comments »
Wednesday, February 22nd, 2012
This week, a mob of more than 3000 people from all over the world has packed into the subterranean conference space of the San Francisco Marriott Hotel to attend ISSCC 2012, the 55th annual IEEE International Solid State Circuits Conference.
Getting there in time for the opening keynotes first thing Monday morning was easy – no traffic, thanks to the Presidents Day Holiday – but once you came down the escalators into the bowels of the Marriott, it was a total zoo. Of course, ISSCC always is.
As the granddaddy of all solid state conferences, it’s the place where some of the most historic circuit design announcements have been made over the years. Everybody wants to be there, and this past Monday nobody appeared to regret not having the day off – particularly during the plenary session when the cavernous hall was filled with thousands of people sitting in countless tidy rows, stretching off into the darkness. Even the keynote speakers commented on the impact of looking out across that sea of people. Yeah, ISSCC is really something.
This year’s keynotes included SanDisk co-founder Eli Harari talking about the history of Flash, a technology he said is now both ubiquitous and unstoppable, and well on its way to eliminating HDDs in its meteoric rise to success fueling the consumer electronics industry.
STMicro Senior EVP Carmelo Papa spoke of a critical synergy between energy consumption and semiconductors: More people and bigger cities in the coming decades will exceed all power utility capacity, he said, unless smart chips, bodies, homes, grids, and governments build together on the efficiencies and intelligent promise of IC-based systems.
In a similar vein, Renesas EVP Yoichi Yano promised MCUs, in combination with Flash, will ease a plethora of power-demand problems and will go a long way to making the world green, at last.
Finally, Intel EVP David Perlmutter gave an emotion-packed keynote that laid out strategies for optimizing transistor-level power consumption, invoking all the usual suspects – smaller process technologies, 3D stacking, and heterogeneous multi-core devices. Perlmutter’s address was as close as it comes to a rousing stump speech and call to action for the uber-nerds of the semiconductor industry. It was fabulous.
Between keynotes, major awards were presented at ISSCC on Monday morning. Of interest to those in EDA, stalwart industry legend Ron Rohrer received the 2012 Gustav Kirchhoff Award, and UCLA’s Behzad Razavi received the 2012 Donald O. Pederson Award. Those who know Rohrer would not be surprised to learn that when he stepped to the podium to thank the IEEE, he first acknowledged SPICE-collaborator Larry Nagler, and then got a huge roar of laughter from the enormous audience when he admitted that Kirchhoff’s Laws are the only laws he has managed to obey throughout his life.
During a break in the 4-hour plenary session marathon, I dashed into the Press Room for a cup of coffee, a carb, and a chance to catch up with various colleagues. Dave Bursky was there – busy with his new enterprise, PRN Engineering Services, and continuing to astound by attending more conferences per week than anyone else in the industry.
(more…)
Tags: Behzad Razavi, Carmelo Papa, Chris Edwards, Dave Bursky, David Perlmutter, Eli Harari, ISSCC 2012, K.C. Smith, Larry Nagler, Laura Fujino, Luke Collins, Mar Hershenson, Mike Santarini, Pallab Chatterjee, Paul Dempsey, Richard Goering, Ron Rohrer, Ron Wilson, Terri Fiez, Tets Maniwa, Yoichi Yano No Comments »
Friday, February 17th, 2012
Here’s your February Pop Quiz.
******************
1 – DVCon 2012 starts on February 27th. The conference was first held in _____.
a) 1989
b) 1995
c) 1998
d) 2003
2 – The IEEE Standards Association [IEEE-SA] oversees approximately _____ standards and _____ standards under development.
a) 500, 900
b) 800, 600
c) 900, 500
d) 700, 900
3 – The IEEE Standard associated with VHDL is _____.
a) IEEE Std 1064
b) IEEE Std 1076
c) IEEE Std 1164
d) IEEE Std 1176
4 – Accellera merged with _____ in 2011.
a) VSIA
b) OSCI
c) OCP-IP
d) OVI
5 – DVCon is managed by MP Associates, the same group that manages _____.
a) ICCAD
b) DesignCon
c) Semicon
d) ISQED
6 – The 2007 General Chair of DVCon was _____.
a) Tom Fitzpatrick
b) Stephen Bailey
c) Shankar Hemmady
d) Gabe Moretti
7 – SystemVerilog was donated to Accellera in _____.
a) 2000
b) 2001
c) 2002
d) 2003
(more…)
Tags: Aart de Geus, Accellera, Andrew Piziali, Brett Cline, Brian Bailey, Cadence, Cliff Cummings, CPF, DVCon, Gabe Moretti, Gary Smith, Grant Martin, IEEE Standards, JL Gray, John Cooley, Karen Bartleson, Kathryn Kranen, Magma, Mentor, MP Associates, OSCI, OVI, OVM, Paul McLellan, Rajeev Madhavan, Richard Goering, Synopsys, SystemC, SystemVerilog, Ted Vucurevich, UPF, UVM, Verilab, Verilog, VHDL, VHDL International, Wally Rhines 1 Comment »
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