The industry is excited about RISC-V, and rightly so. It is enabling companies to take back control of their software execution environment without having to assume the huge responsibilities that come along with processor development and support of an ecosystem for it. Maybe a company wants to use a commercially developed core today, get the software developed and the processor integrated and then in a future generation, replace that with their own core. Perhaps they envision a range of products where the processor is tuned for each product in the family. There are so many possibilities that were out of reach in the past. (more…)
Posts Tagged ‘portable stimulus’
PSS and RISC-V – A Match Made In Verification
Thursday, November 14th, 2019Methodology Convergence
Thursday, August 8th, 2019It is unfortunate that design and verification methodologies have often been out of sync with each other, and increasingly so over the past 20 years. The design methodology change that caused one particular divergence was the introduction of design Intellectual Property (IP). IP meant that systems were no longer designed and built in a pseudo top-down manner, but contemplated at a higher level and constructed in a bottom up, ‘lego-like’ manner by choosing appropriate blocks that could implement the necessary functions. (more…)
Multi-Dimensional Verification
Tuesday, May 28th, 2019It seems like ancient history now, but in the not so distant past, verification was performed by one tool – simulation; at one point in the flow – completion of RTL; using one language and methodology – SystemVerilog and UVM. That changed when designs continued to get larger and simulators stopped getting fast enough. Additional help became necessary in the form of emulators and formal verification, but that coincided with an increasingly difficult task of creating a stable testbench. It was no longer possible to migrate a design from a simulator to an emulator without doing a considerable amount of work on the testbench. (more…)
Improve or Enable
Thursday, April 18th, 2019New tools, languages, or methodologies can be an improvement over existing ones, or they can be enablers for something different. The recently approved Accellera Portable Stimulus Standard (PSS) can be either or both. (more…)
What Can PSS Do For You? See Breker’s Demos of Trek5’s Capabilities at DVCon
Thursday, February 21st, 2019All of us at Breker invite DVCon attendees to step into our booth (#701) and expect to be amazed. You will see practical demonstrations of our new feature-rich Trek5 with practical examples of how the Portable Stimulus Standard can be applied to accelerate UVM coding for complex blocks and Software Driven Verification (SDV) for large SoCs. (more…)
Methodology, Language and Tools
Tuesday, January 15th, 2019Let me start by laying the cards on the table – the Portable Stimulus Standard (PSS) is a language, not a methodology. Tools are not methodologies. Languages ensure a well-ordered transfer of information from which tools can be constructed. A methodology is a way of systematically breaking down and solving a problem in a manageable manner. Tools can enable methodologies, and, over time, tools may help to manage a methodology once it has become standardized. No standard methodologies exist today for PSS, neither are the capabilities of tools defined by the language. (more…)
The Making of a Standard
Thursday, June 21st, 2018The industry waits with bated breath for the Accellera board to approve the Portable Stimulus 1.0 specification. It has been a long and arduous process over the past four years to get to this point, a process that most people never get to experience. This was my first standard, and to say it was an eye opener is somewhat of an understatement. In this blog, I am not going to dwell on the many bruises I suffered or the technical discussions that often seemed like personal attacks. Instead, I want to make the industry aware of some of the difficulties associated with bringing a new and somewhat revolutionary standard to market. (more…)
System Functionality Includes Software
Monday, April 23rd, 2018Listening to users is never a bad thing. Users are the people who set Breker along its current direction and during the process of standardizing Portable Stimulus (PS), the ability to talk to an expanded group of users allowed Breker to see a larger portion of the total available market. We learned a lot. (more…)
UVM is Dead! Long live UVM+PS!
Thursday, February 22nd, 2018When the forebears of SystemVerilog and UVM were being created, the world was a different place. Verification was primarily directed testing and code coverage was good enough to signal completion. Development of directed tests was getting to be slow, cumbersome and difficult to maintain. Languages and tools were created that added the ability to randomize stimulus but that created two problems. First, you had no idea what a test had accomplished and second, you had no idea that the design had actually reacted in the right manner. Thus, two additional models became necessary: a combination of checkers and scoreboard and the coverage model. The big problem was, and remains, that the three models are independent models only unified by a thin layer of syntax. (more…)
Dual Focus Will Help Adoption
Wednesday, January 31st, 2018One of the great things associated with the development of a standard, such as the Portable Stimulus Standard (PSS), is that it brings together various stakeholders – often a broader selection of people than any single company did business with. When you initially develop a product you gear it toward a particular problem, one that you have some familiarity with. The resulting product attracts engineers who resonate with the product and they provide valuable feedback. This in turn helps to make the product more attractive to engineers with a similar need. If you are not careful, you can have a product that targets a narrow part of the market and that is all you learn to explore. It is the Innovators Dilemma, and can stop a company from developing a general purpose product. (more…)