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Archive for the ‘Knowledge Depot’ Category

PSS and RISC-V – A Match Made In Verification

Thursday, November 14th, 2019

The industry is excited about RISC-V, and rightly so. It is enabling companies to take back control of their software execution environment without having to assume the huge responsibilities that come along with processor development and support of an ecosystem for it. Maybe a company wants to use a commercially developed core today, get the software developed and the processor integrated and then in a future generation, replace that with their own core. Perhaps they envision a range of products where the processor is tuned for each product in the family. There are so many possibilities that were out of reach in the past. (more…)

Methodology Convergence

Thursday, August 8th, 2019

It is unfortunate that design and verification methodologies have often been out of sync with each other, and increasingly so over the past 20 years. The design methodology change that caused one particular divergence was the introduction of design Intellectual Property (IP). IP meant that systems were no longer designed and built in a pseudo top-down manner, but contemplated at a higher level and constructed in a bottom up, ‘lego-like’ manner by choosing appropriate blocks that could implement the necessary functions. (more…)

Multi-Dimensional Verification

Tuesday, May 28th, 2019

It seems like ancient history now, but in the not so distant past, verification was performed by one tool – simulation;  at one point in the flow – completion of RTL;  using one language and methodology – SystemVerilog and UVM. That changed when designs continued to get larger and simulators stopped getting fast enough.  Additional help became necessary in the form of emulators and formal verification, but that coincided with an increasingly difficult task of creating a stable testbench. It was no longer possible to migrate a design from a simulator to an emulator without doing a considerable amount of work on the testbench. (more…)

Interim Solutions to the Standards Gap

Thursday, March 14th, 2019

The point of standards is to bring an industry together, to avoid duplication of effort, and to reduce risks associated with adoption of technology that may lock a user into a single vendor. These are some of the reasons why Breker was glad to see the creation of the Portable Stimulus working group within Accellera and actively participated in it since its inception. We donated technology and invested more time and effort, as a percentage of company size, than any other player. We were also glad to see the release of version 1.0 of the standard at DAC in 2018 – a huge step for the industry.

But was it enough? Some standards are ratified having been developed and refined by a single company and successfully proliferated across an industry, prior to donation to a standards body. Others are designed by committee and therefore run the risk of an unproven body of work captured as a hard to change standard. Sometimes this works well, other times, less so. It is only after the fact that you know if the committee got it right. So far the Portable Stimulus Standard is being tested by a relatively large number of companies with success, but there are still missing elements for a scalable solution. (more…)

Portable Stimulus: Finding The Killer App

Thursday, November 29th, 2018

Functional verification vendors have been talking a lot about the Portable Stimulus Standard (PSS), but what is it and why should you care? To put it in stark terms – because it is the first language that supports  verification methodology and because the existing methodology is failing to provide the capabilities required for system-level verification. (more…)

System Functionality Includes Software

Monday, April 23rd, 2018

Listening to users is never a bad thing. Users are the people who set Breker along its current direction and during the process of standardizing Portable Stimulus (PS), the ability to talk to an expanded group of users allowed Breker to see a larger portion of the total available market. We learned a lot. (more…)

Industry Struggles with System Coverage

Thursday, March 15th, 2018

DVCon is a great place to talk to design and verification engineers. As the Accellera Portable Stimulus Standard (PSS) gets closer to reality, we were able to share with them during the conference the progress made and the ways in which it may impact their task. Most of them are as excited about PSS as we are. While we have been working in this field for more than a decade and have received a lot of feedback, there are now many more people becoming aware of it and the potential that it has. This provides us with the opportunity to learn as well. (more…)

UVM is Dead! Long live UVM+PS!

Thursday, February 22nd, 2018

When the forebears of SystemVerilog and UVM were being created, the world was a different place. Verification was primarily directed testing and code coverage was good enough to signal completion. Development of directed tests was getting to be slow, cumbersome and difficult to maintain. Languages and tools were created that added the ability to randomize stimulus but that created two problems. First, you had no idea what a test had accomplished and second, you had no idea that the design had actually reacted in the right manner. Thus, two additional models became necessary: a combination of checkers and scoreboard and the coverage model. The big problem was, and remains, that the three models are independent models only unified by a thin layer of syntax. (more…)

Dual Focus Will Help Adoption

Wednesday, January 31st, 2018

One of the great things associated with the development of a standard, such as the Portable Stimulus Standard (PSS), is that it brings together various stakeholders – often a broader selection of people than any single company did business with. When you initially develop a product you gear it toward a particular problem, one that you have some familiarity with. The resulting product attracts engineers who resonate with the product and they provide valuable feedback. This in turn helps to make the product more attractive to engineers with a similar need. If you are not careful, you can have a product that targets a narrow part of the market and that is all you learn to explore. It is the Innovators Dilemma, and can stop a company from developing a general purpose product. (more…)

Solution = Standard + Tool

Thursday, November 30th, 2017

Solutions are what users need and the existence of a standard gives them the assurance that models they create will be portable between tools. Put another way, the standard creates a level playing field on which vendors can create tools that provide solutions.  (more…)




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