According to the latest forecast from International Data Corporation (IDC), the semiconductor market has reached a bottom and will soon return to growth. For 2023, the market research firm has revised its September forecast and now estimates that worldwide semiconductor revenue this year will grow to $526.5 billion – down 12% from $598 billion in 2022, but up from the previously estimated $519 billion. For 2024, IDC expects year-over-year growth of 20.2% to $633 billion, up from $626 billion in the prior forecast. Growth in 2024-2026 will be fueled by AI silicon, which by the end of this forecast period will account for almost $200 billion in semiconductor revenues.

Synopsys.ai Copilot

Synopsys has announced Synopsys.ai Copilot, the result of a collaboration with Microsoft to integrate Azure OpenAI Service that brings GenAI into the design process for semiconductors. According to the company, Synopsys.ai Copilot works alongside designers in the Synopsys tools they use every day, enabling conversational intelligence, in natural language, across the design team. Deployable in any on-prem or on-cloud environment, Synopsys.ai Copilot integrates Microsoft Azure on-demand computing infrastructure.

Autodesk’s Fusion is now integrated with Cadence’s Allegro X and OrCAD X

Autodesk’s Fusion mechanical CAD platform has been integrated with Cadence’s Allegro X and OrCAD X PCB design platforms. The collaboration between the two companies aims at solving the problems of current manual design data methods, which require electrical and mechanical engineers to exchange files that can differ from design intent – resulting in errors, unnecessary re-work and costly delays. According to the two companies, the integrated solution enables seamless bi-directional communication between PCB designers and mechanical engineers.

Read the rest of Synopsys.ai Copilot; Autodesk-Allegro integration; Microsoft’s chips; circumvention of export restrictions

Japan’s government will reportedly allocate roughly $13 billion to boost its semiconductor industry. Part of this money is expected to be used to support TSMC and the recently founded Japanese foundry venture Rapidus. Let’s now move to the other news, which this week includes some announcements from Risc-V Summit North America.

Risc-V updates

Synopsys has extended its ARC Processor IP portfolio to include new Risc-V ARC-V Processor IP. The new Risc-V family includes the 32-bit ARC-V RMX embedded processor IP, scheduled to be available in Q2 of 2024; and the 32-bit ARC-V RHX real-time processor IP and 64-bit ARC-V RPX host processor IP, both scheduled to be available in the second half of 2024. Synopsys also announced it has joined the Risc-V International Board of Directors and Technical Steering Committee.

Ventana has announced the second generation of its Veyron family of datacenter Risc-V processors. According to the company, the new Veyron V2 is the highest performance Risc-V processor available today. It is offered in the form of chiplets and IP. Besides datacenters, V2 targets automotive, 5G, AI, and client applications.

Read the rest of Risc-V updates; chiplets in automotive applications; GenAI on smartphones; China’s advanced NAND chip

Risc-V starts attracting attention in the context of U.S.-China “chip war”: a bipartisan group of eighteen U.S. lawmakers that includes five Democrats is reportedly asking the Biden administration to prevent China from achieving dominance in Risc-V technology at the expense of U.S. national and economic security. Let’s now move to this week’s news roundup, starting with some EDA updates.

EDA updates: Cadence, Synopsys, Accellera

The new Cadence Voltus InsightAI is – according to the company – the industry’s first generative AI technology that automatically identifies the root cause of EM-IR drop violations early in the design process and selects and implements the most efficient fixes to improve power, performance, and area (PPA). As Cadence maintains, users of Voltus InsightAI can fix up to 95% of violations prior to signoff, leading to a 2X productivity improvement in EM-IR closure.

The new Synopsys Cloud OpenLink program enables chip designers to seamlessly access EDA tools and IP from multiple vendors in the Synopsys Cloud environment. As part of this initiative, the company is releasing an API specification that Synopsys Cloud OpenLink program members can use to deploy system-level integration with a secure and reliable transfer of entitlements to Synopsys Cloud.

Accellera has announced the availability of the Clock Domain Crossing (CDC) Draft Standard 0.1 for public review. This standard aims to ease SOC integration, which often involves combining in-house and externally purchased IPs. The public review is open through December 31, 2023.

Read the rest of Using AI against EM-IR violations; multi-vendor EDA tools on a single cloud; the 92-billion transistor Apple processor

Catching up on some of the news from the last twenty-five days or so, this week we report about some interesting EDA related updates – but first, some press reports and company announcements suggesting an upcoming shakeup in the PC processor landscape.

Nvidia to reportedly develop Arm-based processors for Windows PCs

According to a Reuters report, Nvidia has begun designing Arm-based CPUs that would run Microsoft Windows. Nvidia’s initiative is reportedly driven by Microsoft’s effort to help chipmakers build Arm-based processors for Windows PCs, trying to replicate the success that Apple is having with its own Arm-based chips for Mac computers. Qualcomm has been making Arm-based chips for Windows laptops since 2016, but its exclusive license is reportedly expiring in 2024. After that deadline, Microsoft would encourage more chipmakers to join the effort, to avoid relying solely on Qualcomm. AMD is also reportedly planning to make chips for PCs with Arm technology.

Qualcomm’s new PC processor

And Qualcomm has just unveiled the Snapdragon X Elite platform for PCs. It features the custom integrated Qualcomm Oryon CPU and – according to the company – delivers up to two times faster CPU performance versus the competition, matching competitor peak performance with one-third of the power. In terms of AI performance, Qualcomm claims that Snapdragon X Elite can run generative AI models with over 13 billion parameters on-device. PCs powered by Snapdragon X Elite are expected starting mid-2024.

Read the rest of Nvidia to reportedly challenge Intel; Tessent RTL Pro; chiplet standards; Achronix’s speech recognition

OpenAI, the company behind ChatGPT, is reportedly exploring making its own artificial intelligence chips, possibly through the acquisition of an AI chip company. According to a Reuters report, OpenAI aims to gain independence from expensive Nvidia GPUs.

New EDA releases: Keysight, Nullspace, Mathworks

Keysight EDA 2024 software suite offers three major “shift left” updates. “RF System Explorer” streamlines system and circuit level design workflows for early exploration of system architectures in Advanced Design System; “Digital Pre-Distortion Explorer” and “Digital Pre-Distortion Designer” accelerate wide bandgap power amplifier design and validation using the Dynamic Gain Model; “SystemVue” delivers complete Satcom modeling and simulation solutions for 5G non-terrestrial network, DVB-S2X, and phased array product development.

Nullspace has launched the Nullspace Prep and Nullspace EM 2023.9 release, claiming a 2-4x simulation speed improvement for large problems. The company is also releasing the Nullspace EM Solver on the Windows platform; up until now, the product was only available on Linux. Users interested in the Windows version can apply to take part in a Beta program. Additionally, Nullspace has authored a new whitepaper, “Overcoming Limitations of 3D EM Simulation of Electrically Large Devices.”

Read the rest of New EDA releases; Intel’s FPGA unit to become a standalone business; TSMC’s 3Dblox 2.0

Will Silicon Valley’s disruptive innovation capabilities extend to car body manufacturing? In addition to pioneering the use of huge presses with 6,000 to 9,000 tons of clamping pressure, Tesla is reportedly exploring other new solutions to slash the cost of electric vehicles. Technologies being investigated include 3D printing, industrial sand, tailor-made alloys. According to the report, Musk’s goal is to find a way to cast the car’s underbody in one piece.

EDA and IP updates: Zuken, Altair, Ultra Librarian, Intel

Zuken has introduced a three-stage approach to AI-powered PCB design within its CR-8000 platform. The Autonomous Intelligent Place and Route product line introduces a new platform for AI-based place and route, which evolves in stages. “Basic Brain” learns from Zuken’s library of design examples and existing design expertise, and routes the design utilizing the product’s Smart Autorouter based on learned approaches and strategies. In the second stage, Zuken’s “Dynamic Brain” learns from the customer’s PCB designers, utilizing past design examples and integrating them into AI algorithms. The third and final stage is the “Autonomous Brain”, an AI-driven capability that self-improves with each project.

The Ultra Librarian CAD model library is now available to Altair users in several Altair ECAD verification and multiphysics solutions, including PollEx, SimLab, and Altair One UDE. Ultra Librarian gives users instant access to more than 16 million symbols, footprints from a cloud-based library.

And Ultra Librarian has developed a new AI-driven CAD modeling engine to drastically reduce the time it takes to build CAD models.

Intel is launching a new soft processor in the Nios V family targeting its FPGAs: the Nios V/c compact microcontroller – a free, soft-core IP, based on the Risc-V architecture. It will initially target all devices supported in Intel Quartus Prime Pro software with a roadmap to many devices supported in Quartus Prime Standard software.

Read the rest of Intel Innovation event; Zuken’s AI-powered PCB tool; MEMS-based timing

Arm’s Initial Public Offering is proving successful: share price increased almost 25% soon after the company’s Nasdaq listing, which translates into a $65 billion valuation. More themes this week include memory tiering in the datacenters and a new way to use AI in chip design.

AI-enhanced, cloud-based PCB design

The AI-in-EDA trend extends to PCB tools. The new Cadence OrCAD X Platform promises up to 5X faster PCB design thanks to generative AI automation to reduce placement time, and by leveraging Cadence OnCloud integration. According to Cadence, the solution is optimized for small and medium businesses, offering a new, easy-to-learn and easy-to-use PCB layout canvas.

New MLPerf benchmarks

MLPerf Inference v3.1 introduces two new benchmarks to the suite. The first is a large language model (LLM) using the GPT-J reference model to summarize CNN news articles. The second is an updated recommender, modified to be more representative of industry practices, using the DLRM-DCNv2 reference model and a much larger dataset. The latest MLPerf results also include, for the first time, the MLPerf Storage benchmark, which measures the performance of storage systems in the context of ML training workloads.

Read the rest of OrCAD X; memory tiering; treating a circuit like a neural network

The Chinese government will reportedly launch an additional state-backed investment fund aiming to raise about $40 billion for the domestic semiconductor industry. According to Reuters, individual Chinese chipmakers that have already received state subsidies include GTA Semiconductor, specializing in automotive applications, which was reportedly granted over $1.8 billion. Other updates related to the US-China tensions include the growing capability of Chinese chipmakers: more than half, maybe two-thirds of the chips contained in Huawei’s new high-end smartphone are made in China, according to Canadian reverse engineering firm TechInsights. Lastly, the Chinese government has reportedly told state employees to stop using their iPhones at work.

Synopsys unveils its big data analytics solution

Synopsys has extended its Synopsys.ai full-stack EDA suite with a comprehensive AI-driven data analytics continuum for every stage of chip development, leveraging the vast amounts of heterogeneous design data generated by EDA, testing, and IC fabrication tools – such as timing paths, power profiles, die pass/fail reports, process control, or verification coverage metrics. The AI-driven Synopsys EDA Data Analytics (.da) solution includes: Synopsys Design.da to perform deep analysis of data, to uncover PPA opportunities; Synopsys Fab.da to store and analyze large streams of fab equipment process control data, to maximize product quality and fab yield; Synopsys Silicon.da to collect petabytes of silicon monitor, diagnostic, and production test data from test equipment, to improve chip production metrics.

Read the rest of Synopsys’ big data solution; GenAI-specific acceleration; lower cost SWIR sensors; MediaTek’s 3nm chip

Catching up on some of the news from the last thirty days or so, let’s start with the upcoming change of Synopsys’ top management: on January 1^st 2024, Sassine Ghazi will replace Aart de Geus as Synopsys’ Chief Executive Officer. Ghazi assumed the role of Synopsys COO in August 2020 and was appointed to the role of president in November 2021. De Geus (69), founded Synopsys in 1986.

Arm to go public

As previously announced, Arm is going public. On August 20, the company announced that it has publicly filed a registration statement with the U.S. Securities and Exchange Commission relating to its initial public offering on the Nasdaq Global Select Market under the symbol “ARM”.

Nvidia Q2 record results

Nvidia reported record results for the second quarter ended July 30, 2023: global revenue was $13.51 billion, up 88% from Q1 and up 101% from year ago; Data Center revenue was $10.32 billion, up 141% from Q1 and up 171% from year ago. Nvidia has also announced an expanded partnership with Google Cloud which will include the general availability of purpose-built Google Cloud A3 virtual machines powered by Nvidia H100 GPUs.

Read the rest of Arm goes public; Nvidia record results; TSMC’s European joint venture