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 EDACafe Editorial
Roberto Frazzoli
Roberto Frazzoli
Roberto Frazzoli is a contributing editor to EDACafe. His interests as a technology journalist focus on the semiconductor ecosystem in all its aspects. Roberto started covering electronics in 1987. His weekly contribution to EDACafe started in early 2019.

Nvidia to reportedly challenge Intel; Tessent RTL Pro; chiplet standards; Achronix’s speech recognition

 
October 30th, 2023 by Roberto Frazzoli

Catching up on some of the news from the last twenty-five days or so, this week we report about some interesting EDA related updates – but first, some press reports and company announcements suggesting an upcoming shakeup in the PC processor landscape.

Nvidia to reportedly develop Arm-based processors for Windows PCs

According to a Reuters report, Nvidia has begun designing Arm-based CPUs that would run Microsoft Windows. Nvidia’s initiative is reportedly driven by Microsoft’s effort to help chipmakers build Arm-based processors for Windows PCs, trying to replicate the success that Apple is having with its own Arm-based chips for Mac computers. Qualcomm has been making Arm-based chips for Windows laptops since 2016, but its exclusive license is reportedly expiring in 2024. After that deadline, Microsoft would encourage more chipmakers to join the effort, to avoid relying solely on Qualcomm. AMD is also reportedly planning to make chips for PCs with Arm technology.

Qualcomm’s new PC processor

And Qualcomm has just unveiled the Snapdragon X Elite platform for PCs. It features the custom integrated Qualcomm Oryon CPU and – according to the company – delivers up to two times faster CPU performance versus the competition, matching competitor peak performance with one-third of the power. In terms of AI performance, Qualcomm claims that Snapdragon X Elite can run generative AI models with over 13 billion parameters on-device. PCs powered by Snapdragon X Elite are expected starting mid-2024.

Intel to support the development of PCs with AI capabilities

Intel, on its part, has launched its “AI PC Acceleration Program”, a global innovation initiative designed to accelerate the pace of AI development across the PC industry. The program aims to connect independent hardware vendors (IHVs) and independent software vendors (ISVs) with Intel resources that include AI toolchains, co-engineering, hardware, design resources, technical expertise and co-marketing opportunities. In Intel plans, these resources will help the ecosystem take full advantage of Intel Core Ultra processor technologies and corresponding hardware to maximize AI and machine learning application performance, accelerate new use cases and connect the wider PC industry to the solutions emerging in the AI PC ecosystem.

Siemens’ Tessent RTL Pro

Siemens Digital Industries Software has unveiled Tessent RTL Pro, a software solution developed to help IC design teams streamline and accelerate a broad array of critical design-for-test (DFT) tasks. Extending the Tessent portfolio’s design editing capabilities, Tessent RTL Pro automates the analysis and insertion of test points, wrapper cells, and x-bounding logic earlier in the design flow, which can help customers shorten design cycles and improve the testability of their designs. According to Siemens, unlike competing solutions, Tessent RTL Pro handles complex Verilog and SystemVerilog constructs while maintaining the look and feel of the original RTL design.

OCP-JEDEC jointly developed chiplet description format

The collaboration between the Open Compute Project Foundation (OCP) and JEDEC on chiplet standards has reached a significant development. The integration of OCP CDXML into JEP30 enables chiplet builders to provide standardized chiplet part descriptions to their customers electronically. This advancement opens the door to automating System in Package (SiP) design and assembly using chiplets. The chiplet descriptions encompass crucial information for SiP builders, including thermal properties, physical and mechanical requirements, behavior specifications, power and signal integrity properties, testing in-package and security parameters.

PI Expert adds schematic and netlist export

Power Integrations and SnapMagic have announced that PI Expert, Power Integrations’ online design tool, now features schematic and netlist export, made possible by SnapMagic’s new schematic export technology. Based on specifications input by the user, PI Expert now automatically generates a complete power supply schematic utilizing Power Integrations’ power-conversion ICs, including a custom magnetics design. Previously, the automated tool flow required manual transcription into a CAD package to facilitate simulations and physical layout.

Nvidia-Foxconn partnership

Nvidia has announced a partnership with Foxconn covering several AI application areas. Foxconn will integrate Nvidia technology to develop a new class of data centers powering a wide range of applications — including digitalization of manufacturing and inspection workflows, development of AI-powered electric vehicle and robotics platforms, and a growing number of language-based generative AI services. Additionally, Foxconn electric vehicles will be built on Nvidia Drive Hyperion 9, a platform for autonomous automotive fleets; Foxconn robotic systems will be built on the Nvidia Isaac autonomous mobile robot platform; and Foxconn “Smart City” solutions will incorporate the Nvidia Metropolis intelligent video analytics platform.

Achronix’s high performance speech recognition solution

FPGA vendor Achronix in partnership with Myrtle.ai has developed an accelerated automatic speech recognition solution based on the Speedster7t FPGA. The new solution converts spoken language to text in over 1,000 concurrent real-time streams with high accuracy and fast response times while delivering – according to the company – up to a 20 times improvement in performance over competing solutions. Achronix claims that a single card in a server can replace up to 20 CPU-only-based servers or 15 GPU cards, reducing costs by up to 90%.

Risc-V updates: Codasip, SiFive

Codasip has announced a new highly configurable family of Risc-V baseline processors. The range, called the “700 family”, includes application and embedded cores. SiFive has announced two new products designed to address new requirements for high performance compute: the SiFive Performance P870 and SiFive Intelligence X390.

ADAS updates: Socionext, indie

Socionext is developing custom SoCs for advanced ADAS (Advanced Driver Assistance Systems) and autonomous driving using N3A, TSMC’s latest 3nm automotive process technology. Target production of the SoCs will be in 2026. And indie Semiconductor has expanded its automotive camera video processor portfolio with the iND87540, a system-on-chip (SoC) that enables viewing and sensing capability at the vehicle’s edge. The device mainly targets ADAS applications based on a distributed intelligence architecture.

Renesas reorganization

Renesas has announced a new organizational structure and leadership team appointments. These changes will take effect January 1, 2024. The new structure will include four technology-based product groups: Analog & Connectivity, Embedded Processing, High Performance Computing, and Power.

Acquisitions

AMD has signed a definitive agreement to acquire Nod.ai, specializing in AI software. The compiler-based automation software capabilities of Nod.ai’s Shark software reduce the need for manual optimization and the time required to deploy AI models to run across a range of platforms powered by AMD CDNA, XDNA, RDNA and “Zen” architectures.

Emerson has closed its acquisition of NI (National Instruments), a provider of software-connected automated test and measurement systems, at an equity value of $8.2 billion. NI will become a new reported segment within Emerson called Test & Measurement and will be consolidated into the Software and Control group. The Test & Measurement business will continue to be headquartered in Austin, Texas.

Further reading

Semiconductor Research Corporation (SRC) has unveiled the Microelectronics and Advanced Packaging (MAPT) Roadmap, crafted through the collective effort of approximately 300 individuals representing 112 organizations from industry, academia, and government. The MAPT Roadmap – available at https://srcmapt.org/ – defines critical research priorities and technology challenges that SRC thinks must be addressed.

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