Posts Tagged ‘https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl’
Wednesday, January 29th, 2014
 Next up in our series is Simon Bloch’s forecast for 2014. Simon is Sr. Director of Samsung Electronics R&D, in mobile consumer wireless devices.
“The future of electronics is looking bright! Market forecasters predict growth in literally every category of electronic markets ranging from smart mobile and wearable devices, appliances and sensors connected to a network of Internet of Everything to smart connected cars and cities.
In today’s electronics products, sophisticated hardware is becoming insufficient for product success. Many layers of stacked software control the underlying hardware and determine a product’s competitiveness via functionality, performance, power and cost. And while there is always going to be a need to create new semiconductor components and IC companies will need EDA tools, EDA vendors need to expand the view of Electronics and treat software stack as an integrated part of EDA.
There are many opportunities to come up with products in the software stack space around Linux/Android operating systems and in the area of hardware virtualization. Just last month, CyanogenMod, a company that provides Android based software widely used in the mobile industry, secured $23 million in funding from top tier VCs. CyanogenMod is a software stack product and contains many features not found in Google versions of the operating system.
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Tags: Chip Design, CyanogenMod, EDA, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Intellectual property, Internet of Things, IoT, IP, Lee PR, Lee Public Relations, Samsung, SDA, Semiconductor IP, semiconductors, SoC, Software Design Automation, System on Chip, www.leepr.com
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Monday, January 27th, 2014
 We asked Mike Gianfagna, VP of Marketing at eSilicon and former VP of Corporate Marketing at Atrenta, about EDA, IP and the chip industry in 2014.
Ed: What does EDA and IP need to do in 2014?
Mike: Work more effectively with each other. IP integration continues to be a huge bottleneck for SoC design. A more uniform quality metric and a way to enforce it is desperately needed. This problem can’t be solved in isolation. EDA and IP companies need to collaborate to tame this issue. They can do it.
Ed: What does the chip industry want from EDA and IP in 2014?
Mike: The same thing really. Every SoC project is dependent on somebody’s IP. Whether it’s internally supplied or provided by your favorite IP supplier or your favorite ASIC supplier, the requirement for easy integration with no surprises is the same. Better collaboration between members of the SoC supply chain will definitely help.
Tags: 2014, Atrenta, Chip Design, EDA, EDA & IP, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Intellectual property, IP, IP integration, Lee PR, Lee Public Relations, Semiconductor IP, semiconductors, SoC, System on Chip
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Sunday, January 19th, 2014
Next up in our series of 2014 forecasts we have the sage predictions of Angel Orrantia, Business Development Director at SKTA Innopartners LLC….
“Aside from some massive players, the rest of the chip industry has been forced to adopt capital light business models. Simultaneously, we’re seeing the mask costs making advanced nodes prohibitively expensive.
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Tags: EDA, EDA & IP, Electronic Design Automation, Finance, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Intellectual property, IP, Lee PR, Lee Public Relations, Semiconductor IP, semiconductors, SK telecom Americas, SKTA Innopartners, SoC, VC, Venture Capital
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Monday, September 30th, 2013
There’s an EDA industry reunion at the Computer History Museum on October 16th. “EDA: Back to the Future” is being put on by EDAC along with several sponsors, and it looks like it will be a night to remember. To learn more about the event and purchase tickets click here.
Part of this event is a fund raising auction. I recently talked with Mike Gianfagna at Atrenta about the auction to understand what that part is all about.
Ed: Mike, I understand that part of the event on October 16th is a fund raising auction. Can you tell me a little about that?
Mike: Sure Ed. The Computer History Museum is working on an exhibit for EDA – one that captures the rich history of this industry and preserves some of its innovation in the form of physical artifacts and some of its pioneers in the form of oral histories, captured on video. It’s a terrific project, but we need money to keep the progress going. The auction on the evening of October 16th is focused on raising that money.
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Tags: Atrenta, Computer History Museum, EDA, EDA Consortium, EDAC, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, semiconductors, SoC, System on Chip
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Tuesday, September 17th, 2013
Are you thinking of starting a hardware company? Although it takes a lot more for a hardware startup to become “venturable” than a software startup, viable funding can be found.
Ilgiz Akhmetshin, of SKTA Innopartners details several ways for hardware startups to raise additional funds in his blog: “How to Raise Seed Investments for a Hardware Startup.”
Lee PR does work for SKTA Innopartners.
Tags: accelerators, crowdfunding, Finance, hardware, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Ilgiz Akhmetshin, incubators, Innopartners, Lee PR, Lee Public Relations, seed funding, semiconductors, SKTA, SKTA Innopartners, VC, venture capitol
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Wednesday, August 28th, 2013
Atrenta will discuss what RTL signoff requirements are needed for SoC designers in China, South Korea and Taiwan at their upcoming seminars in September and October.
Click here for more information.
LPR does work for Atrenta
Tags: Atrenta, Chip Design, EDA, EDA & IP, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Intellectual property, IP, Lee Public Relations, register transfer level, RTL, RTL signoff, Semiconductor IP, semiconductors, SoC, System on Chip
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Tuesday, August 20th, 2013
We often think that we’ve got the timing job nailed down and that there aren’t any problems that we can’t easily, almost routinely solve. Using timing exceptions to optimize synthesis or P&R shouldn’t be a problem.
However, making an error when specifying timing exceptions can possibly shut down a design project.
Take a look at what Atrenta’s Shaker Sarwary, Ramesh Dewangan and Sridhar Gangadharan say about how to avoid this situation:
http://alturl.com/99bbs
(Note: white paper download requires registration)
LeePR does work for Atrenta.
Tags: Atrenta, EDA, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Lee Public Relations, register transfer level, RTL, semiconductors, SoC, SpyGlass, System on Chip, Timing Constraints
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Tuesday, August 13th, 2013
Do you want to know the latest on ESL? Curious what today’s tools look like?
Gary Smith will be conducting a webinar this coming Monday on this very topic – ESL – are you Ready?
Gary, along with Mike Gianfagna of Atrenta and Jason Andrews and Frank Schirrmeister of Cadence, will examine the evolution of ESL over the past few years and share the breakthroughs that have occurred in the flow.
When is it?
11:00-11:45 am PDT
Monday, August 19, 2013
Gary will be recognizing the industry’s “ESL Heroes.” Want to know what an ESL Hero is? Tune in Monday to find out.
You can register for the webinar here.
Tags: Atrenta, Cadence, Chip Design, EDA, Electronic Design Automation, Embedded, ESL, Gary Smith, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Lee Public Relations, semiconductors, software
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Monday, August 12th, 2013
Before the summer ends and the summer blockbuster movies and DAC become a distant memory (still shaking my head over The Lone Ranger’s flop), let me just share Mike Gianfagna’s vision for next summer’s blockbuster.
It’s a tad more like Terminator 2 than the masked man and Tonto. And it may not be too far from reality – that’s what’s exciting…..and scary.
Of course it’s about the semiconductor supply chain and how it might affect our lives in the future.
 Click here to look into the future.
~ Liz
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Tags: Atrenta, Chip Design, Chips, EDA, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Lee Public Relations, register transfer level, RTL, Semi IP, semiconductors
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Monday, July 22nd, 2013
For those in fabless semiconductor or IP startup mode (or even thinking about how to start up and get funding), take a look at Paul McLellan’s report on a couple of panel sessions at the annual GSA Entrepreneurship Conference, held last Thursday, July 18 at the Computer History Museum.
Of note is that the first session’s panelists brought a variety of funding models to the table – from a traditional VC to Intel Capital to a brand new incubator on the scene – SKTA Innopartners. In fact, any of you fabless guys really should talk to Angel Orrantia at SKTA. They are focused on fabless semiconductors and enterprise software.
Below is an excerpt from Paul’s write-up:
GSA Entrepreneurship: Getting Money In and Out
 Paul McLellan by
Paul McLellan
Published on 07-18-2013 11:32 PM
This afternoon and evening I was at GSA’s entrepreneurship conference at the Computer History Museum. The first two panel sessions were essentially on getting money into companies to get them started (or growing them), and getting money out when you have built the business.
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Tags: Computer History Museum, Enterprise Software, Entrepreneurs, Global Semiconductor Alliance, GSA, GSA Entrepreneurship Conference, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Lee PR, Lee Public Relations, Paul McLellan, Semi, Semi funding, semiconductor funding, semiconductors, SemiWiki, SKTA Innopartners, startups, VC, Venture Capital
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Next up in our series is Simon Bloch’s forecast for 2014. Simon is Sr. Director of Samsung Electronics R&D, in mobile consumer wireless devices.
