Aldec Design and Verification Posts Tagged ‘SoC Verification’How Can Verification IPs Help the SoC Testing Process?Monday, April 20th, 2015
How to use VIPs In Practice
Allow me to describe a typical verification process, and explain why I recommend the use of Verification IPs within the testing process.
Back from DACTuesday, June 11th, 2013Functional Verification Insights from Austin
I just returned back to the office from the 50th Design Automation Conference (DAC) which took place in Austin, TX, on June 2—6. As I began compiling my trip report, I thought that I might share some of my observations, especially for those who couldn’t attend this industry event but still wanted to gain some insight.
Conference itself One of the reasons I like DAC is that it has always been the main industry event, attracting people from all over the world, and provides participants with the opportunity to meet most of their key customers, ecosystem partners, and competitors in a single location. From an exhibitor’s perspective, DAC is mainly about engaging with attendees on the floor, learning about their current and anticipated challenges, and educating them on how they can innovate and succeed using our product offerings. |
|||||
|
|
|||||
|
|||||
