Archive for 2012
Wednesday, April 25th, 2012
When you think of Forte, think of the shopping mall – because just as Macy’s and Nordstrom’s are anchor tenants in your local mall, Forte Design Systems is the anchor tenant in the ESL mall.
 Also when you think of Forte, think of Brett Cline. Brett’s been the face of the company for many a year, and continues to address with palpable enthusiasm the past, present, and future of everything having to do with the ESL – Forte and the system-level design shopping mall within which the company functions.
Last month, here in What Would Joe Do, Calypto had center stage speaking about their recent acquisition of the Catapult C high-level synthesis tool from Mentor Graphics.
This month, Forte has center stage by way of Brett’s response to Calypto. When we spoke by phone this week, Brett began by countering Calypto VP Shawn McCloud’s comment that Forte is in trouble.
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Tags: Brett Cline, Cadence, Calypto, ESL, Forte, Forte Design Systems, Mentor Graphics
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Tuesday, April 24th, 2012
There’s good news and bad news, in my opinion, with regards to Rajeev Madhavan, founder and CEO of Magma Design Automation, a company that was acquired by Synopsys on February 22, 2012.
The good news it that Rajeev is available to the press for candid interviews like the one included below. The bad news is Rajeev is not going to be part of the EDA landscape as he explores various options for the next phase of his life – and that means the industry will be just that much less interesting, at least for a while.
We spoke by phone in late February.
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Peggy: Hey, Rajeev, how are you doing?
Rajeev: I’m doing pretty much okay as I think about what’s next. I’ve got opportunities, and I’ve got other interests I can now pursue – most people rarely get this kind of opportunity in life, so I’m grateful.
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Tags: Aart de Geus, Andy Bechtolsheim, Cadence, EDA, Intel, M&A, Magma, Magma Design Automation, Mentor Graphics, Rajeev Madhavan, Synopsys, TSMC, Wally Rhines, Wind River
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Thursday, April 19th, 2012
If you’re interested in start-ups, if you think you’ve got what it takes to plunge in and do the deed, the EDA Consortium has something you’re going to want to attend.
Starting on May 31st – that’s in about 5 weeks – EDAC will be offering a series of evening discussions about various “concepts and best practices for emerging companies.”
 The series is going to be hosted by long-time EDA player, Jim Hogan. And as you all know, what Jim Hogan doesn’t know about EDA, start-ups, venture capital, and everything in between, simply isn’t worth knowing – so you’re sure to be in the best of hands with Jim moderating these meetings.
Of course, you don’t just have to be a new, up-and-coming entrepreneur to plan to benefit from the series, because EDAC says: “the content is geared to founders and executives of software, systems, and semiconductor companies, as well as others interested in getting a birds-eye view of what companies face at the various stages of success.”
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Tags: ChipEstimate.com, Dean Drako, EDA Consortium, EDA Emerging Companies Series, EDAC, Georgia Marzalek, Gloria Nichols, Jim Hogan, Ravi Subramanian, Silicon Valley Bank, Steve Pollock
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Sunday, April 15th, 2012
Open Virtual Platforms are an idea whose time has arrived. That is, if you understand what they are. Certainly, if you’re reading this blog, you know what a virtual platform is.
“Platform virtual machines are software packages that emulate the whole physical computer machine, often giving multiple virtual machines on one physical platform.”
For additional clarity, check it out on Wikipedia, paying particular attention to the incredibly dense/complex table found there that attempts to catalog various virtual platforms, their origins, supporting organizations, and features.
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Imperas & Open Virtual Platforms
So, if that’s what virtual platforms are, then what are Open Virtual Platforms, OVPs?
Imperas – an enterprise founded in Silicon Valley in 2008 – would like you to understand and use OVPs. To do that, they are sponsoring a portal-based community called Open Virtual Platforms – a resource designed to help chip developers have access to various open source virtual platforms, or models, of various commonly used hardware platforms endemic to the embedded systems world.
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Tags: AMD, ARM, emulator, Freescale, Imperas, Intel, KVM, Larry Lapides, MIPS, Open Virtual Platform, Oracle, OVP, PalmPilot, Renases, Simon Davidmann, Synopsys, virtual machine, virtual platform, virtualization, VMware, Xilinx
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Friday, April 6th, 2012
It’s April 2012, and both spring and 3D-ICs are in the air. But if Spring means April showers and May flowers, what do 3D-ICs mean?
Well, if you were at EDPS in Seaside this morning, at the Monterey Beach Resort, you would have heard from a host of speakers all addressing the April showers and May flowers of 3D-ICs. The session was organized and well moderated by eda2asic’s Herb Reiter.
 * Showers –
Heat … 3D-ICs kick up a lot of thermal issues between the layers.
* Flowers –
Multiple solutions are under consideration for heat. If you’re rich like IBM, you talk about micro-channels where cooling waters will flow. If you’re not rich – like everybody else – you don’t yet know what to do to sink that heat off-chip and out of harm’s way. Micro channels are too exotic, so stay tuned as solutions are sought out and implemented.
* Showers –
EDA Flow … it’s not quite here, according to many, even though the current tools may be good enough for some. Most believe there are larger needs that should be met.
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Tags: 3D-ICs, eda2asic, EDPS, Herb Reiter
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Thursday, March 29th, 2012
Here are the Top Ten reasons to be going to EDPS next week in Monterey:
10) Next week’s a lighter work week for most and the Monterey Peninsula is beautiful at any time of the year, but particularly in the spring.
9) The Electronic Design Process Symposium is in its 19th year, and everybody who’s anybody in EDA and its adjacencies has attended at one point or another.
Eight) The topics discussed at EDPS have always tracked the trajectory of the industry. In 2000, those topics included: deep sub-micron, distributed and web-based design methodologies, designer productivity, and maintaining modularity in an integrated design flow.
Here in 2012, technology evolution has driven a completely different set of topics: embedded processors, FPGAs, ESL, NUMA, EDA in the Cloud, Big Data and the Big Servers that serve them, low-power design, and 3d-ICs, among others.
7) Going to conferences is as much about conversations outside the sessions, as it is about presenting or listening within the sessions. EDPS is a boutique conference, where I promise you’ll have a chance for substantive conversations with the speakers, both inside and outside of the sessions.
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Tags: 3D-ICs, Altera, Arif Rahman, Azadeh Davoodi, Cadence, Deepak Sekar, Don MacMillen, Dusan Petranovic, EDPS, Electronic Design Process Symposium, Frank Schirrmeister, Gary Smith, Grant Martin, Hans Spanjaart, Herb Reiter, Ian Ferguson, James Colgan, Jim Hogan, Kiron Pai, Marc Greenberg, Mentor, Mike Hutton, Monterey Peninsula, Naresh Sehgal, Phil Marcoux, Qi Wang, Riko Radojcic, Samta Bansal, Sandeep Goel, Sangeeta Aggrwal, Sri Ganta, Steve Leibson, Steve Smith, Steven Pateras, Synopsys, Tom Spyrou
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Wednesday, March 28th, 2012
The folks who run Design West, happening this week at the San Jose Convention Center, modestly call it the Center of the Engineering Universe. In truth, they may not be so far off.
The show used to be Embedded Systems, parts of which still survive therein, but now it’s really so much more. Design West today includes tracks entitled Android, Black Hat, DesignMED, Designing with LEDs, Multicore, and Sensors in Design – some of which used to be shows in themselves. Now they’re all living side-by-side under one Big Top, and seeming to enjoy the synergy.
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Tags: Android, Black Hat, Design West, DesignMED, Embedded Systems, LEDs, Multicore, Sensors, UBM
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Tuesday, March 27th, 2012
Design West is underway this week at the San Jose Convention Center. There are plenty of people in attendance, both in the sessions and in the Exhibit Hall, particularly at the Intel booth.
Intel’s a popular destination at the show, because they’ve got on display there a very interesting thing.
First shown at last fall’s Intel Developers Conference, it’s a musical ensemble that plays when a swarm of several thousand 1″ pellets fly up and out of various hoppers and dispensers and land on the music-making parts of the Rube-Goldberg-like contraption.
The resulting 3-minute concert is captivating from a musical point of view, and fascinating from an engineering point of view. You can see several clips of the performance below.
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Tags: Design West, Intel, Intel Industrial Control in Concert, Robotic musicians, Rube Goldberg
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Saturday, March 24th, 2012
When we last left our hero – that is, Mentor’s Catapult C high-level synthesis tool – it had just been sold off to Calypto in a move that the companies said, “will create a better integrated ESL hardware realization flow.”
Now, some 7 months into the adventure, I spoke with Calypto’s recently appointed VP of Marketing Shawn McCloud at DVCon:
 Shawn: Calypto specializes in the ESL hardware implementation flow. We’re accelerating design with Catapult, optimizing the design for power efficiency with PowerPro, and doing verification with SLEC, which provides equivalence checking from RTL-to-RTL, or from C-to-RTL.
Q: Who’s the competition?
Shawn: Nobody has all 3 of these products, but within high-level synthesis, it’s Forte – and yes, we are the new Mentor. For power, the competition is Apache and Atrenta, but they’re both manual solutions, while we’re automated. And, nobody has our equivalence checking capability.
Q: Your exit strategy?
Shawn: Our goal is to grow 25-to-30%, year over year, and then we will have a number of different options: acquisition, or even an IPO.
(more…)
Tags: Apache, Atrenta, C-to-RTL, Calypto Design Systems, Catapult C, Equivalence Checking, Forte, HLS, LaunchM, Mentor Graphics, PowerPro, RTL-to-RTL, Shawn McCloud, SLEC
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Wednesday, March 21st, 2012
Because Pallab Chattejee went to upwards of 78 technical conferences last year, he probably knows a thing or two about the status of the industry today. It also helps that he’s a long-time IC design adviser, CTO of SiliconMap, a consultancy, and is ramping up a new online publishing presence, Media & Entertainment Technologies, with long-time tech guru Tets Maniwa.
 Among his many involvements, including the IEEE Nanotech Council and U.C. Berkeley’s Engineering Alumni Society, Pallab has been associated with the International Symposium on Quality Electronic Design for all of its 13 years.
He’s headed up most of the committees at one point or another, and this year is serving for a second time as General Chair, so it’s not a complete surprise that Pallab has been named an ISQED 2012 Fellow.
What is a surprise, is Pallab’s candid assessment of the messages that are often the stuff of conference keynote speeches – even those given at ISQED – particularly when those speeches are offered up by EDA vendors or foundries. (more…)
Tags: 20 nanometers, 20nm, DAC, Design Automation Conference, Design rule checks, DRC, E3, ELectronic Entertainment Expo, ISQED, ISQED Fellow, Media & Entertainment Technologies, NAB, National Association of Broadcasters, Pallab Chattejee, SID, SiliconMap, Society for Information Display, Symposium on SID, Tets Maniwa
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Also when you think of Forte, think of Brett Cline. Brett’s been the face of the company for many a year, and continues to address with palpable enthusiasm the past, present, and future of everything having to do with the ESL – Forte and the system-level design shopping mall within which the company functions.
