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Peggy Aycinena
Peggy Aycinena
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.

IP-SoC 2017 – Headliners include de Geus, Saxby

 
November 16th, 2017 by Peggy Aycinena


Dr. Gabriel Saucier has a lot to be proud of
. The Grenoble-based organization she founded, Design and Reuse, is celebrating the 20th anniversary of its flagship conference: IP-SoC.

To celebrate, IP-SoC 2017 is showcasing two of the biggest names in the IP industry – Synopsys CEO Dr. Aart de Geus and ARM founder Sir Robin Saxby. That’s pretty news worthy and a distinct reflection of the significant role Design and Reuse has played for more than two decades in promoting the wide-spread development and reuse of semiconductor IP.

Of course, it’s also worth noting that de Geus and Saxby will not be the only speakers with deep expertise in the technology.

Also presenting in Grenoble, at the 2-day conference on December 6th and 7th, will be Arm’s Alexis Ogborn, Phillip Burr, and Debbie Dekker, Shanghai Jiatoa’s Mark Ma, Sankalp’s Samir Patel, CAST’s Bill Finch, Samsung’s Michael Choi, Soitec’s Phillippe Flatress, GlobalFoundries’ Gerd Teepe, Analog Bits’ Mahesh Tirupattur, Synopsys’ Luis Laranjeira, Chaitanya K, and Thang Tran, Arteris’ Charlie Janac, Codasip’s Roddy Urquhart, Flex Logix’s Geoff Tate, Cadence’s Rishi Chug, Infineon’s Singh Pankaj, Menta’s Imen Baili, Dolphin Integration’s Frederic Renoux and Ilan Sever, Microchip’s Chris Brown, CSEM’s Loic Zahnd and Nicolas Raemy, Inside Secure’s Jerome Allard, Secure IC’s Ismail Guedira, University of Tuebingen’s Dustin Peterson, University of Aveiro’s Abdelgader Abdalla, Warsaw University of Technology’s Wieslaw Kuzmicz, Tiempo’s Marc Renaudin, Extoll’s Mondrian Nuessle, LG’s Ian Lee, Callaghan Innovation’s Sudhir Singh and Chatu Lokuge, UNLZ’s Miguel Antonio Ojeda Moreno, Sensor to Image’s Werner Feith, Algodone’s Jerome Rampon.

This line-up of 40 speakers constitutes one of the best assemblages of experts in the development and deployment of IP anywhere in the world. The fact that they’re all making their way to cold and snowy Grenoble in December attests to the draw of IP-SoC, and its long-term impact on the IP industry.

It also highlights the fact that conferences like DAC have a long way to go to compete with such a line-up. Why is it so hard to put together a similarly large and impactful set of speakers for a conference that purports to support the IP industry, one that’s held annually in far sunnier climes and during far warmer months than Madame Saucier’s legendary, chilly, always-in-December IP SoC?

This is one of those cosmic questions that’s not going to be answered anytime soon.

What does need to happen soon is for you to get your plane and train tickets in place, so you can be in Grenoble by December 5th, in time for the opening session the next morning.

You’ll want time to rest up prior to the conference, because there’s going to be a wine tasting followed by a dinner on the evening of December 6th, and that alone will undoubtedly make the trip worthwhile.

And by the way – security, automotive, analog IP, geopolitical posturing, low power, IoT, energy harvesting, FD-SOI, design methodology, embedded systems, FPGAs, and the ever-fascinating RISC-V are all on the menu in Grenoble.

It would be great to know how the wine pairings would look when matched up against such a diverse set of topics, one that caters to all sorts of styles and tastes in IP. If you’re going to Grenoble in early December, you’ll soon find out.

Have a great time and Bon Appétit!

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