Sage: Who Checks the Checkers?

Sage Design Automation offers iDRM – integrated design rule management – a “true design rule compiler that enables quick graphical capturing of design rules and uses them as executable expressions for Specification, Communication, Validation, DRC, Analysis, Deck validation and coverage, and DRC deck generation.”

But this is not about Sage, it’s about how Sage fits into an evolving industry from the point of view of Raul Camposano, EDA veteran, former CTO at Synopsys, and currently CEO at Sage. Like so many serving in leadership roles in the industry, Dr. Camposano is a man of good cheer and an optimistic observer.

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WWJD: How are things going?

Raul Camposano: Well, I have just stepped out from the events today at the TSMC ecosystem event. This is a fine show, well attended, with both EDA and IP tracks. It is always very interesting. TSMC, of course, is the gorilla in the industry, so it is attended by a lot of people. A mini-DAC, if you will.

WWJD: How is Sage doing?

Raul Camposano: Quite well. We have tools that do QA on decks from design rule checks. And we’re getting good traction in the market. QA is important because the decks today are so complicated. And we must have good decks. They can include from a few thousand to several thousand rules today.

Remember that even a good programmer will [introduce] 3-to-10 bugs per 1000 lines of code, so if the deck has 50,000 lines of code, that’s 50-to-100 bugs, unless you do QA on the code.

And as the nodes increases, there are even more design rules, and the value of those rules increases, which is why we are getting traction.

WWJD: Why don’t the people who produce the DRC decks do their own QA, the foundries, etc.?

Raul Camposano: They do have internal test patterns to check the design rule deck, but that is often done by hand, not with scripts. When you have just a few rules [that process] is adequate, but it becomes very error prone with many rules. We are automating something that has [traditionally] been done by hand.

Yes, the people who write the rules do their own QA, and that’s okay, but with very complex software you need more. You need tools that look for the bugs.

WWJD: Why the name Sage for the company?

Raul Camposano: Because, like in most disciplines in EDA, you want knowledge. The question we address is who checks the checker?

If the person who creates the DRC decks also does the checks, they’ll make the same mistake twice.

Back when I was at Synopsys, if you wanted to check the outcome of synthesis, you had to ask: How do you know we’re not using the same algorithm as synthesis to do the check?

People like it when there are two different approaches. It’s like having an auditor AND an external auditor, to check the books.

WWJD: Who are your customers?

Raul Camposano: We have 10 customers, although some of them don’t like to be named.

We have some major foundries, some memory companies, which are very good applications for what we do, and we have some smaller foundries where our tools can actually can be run in older nodes.

WWJD: With respect the older nodes, aren’t those decks already debugged

Raul Camposano: Yes, that’s true to a large extent, but as you do newer chips with them, you have newer devices and possibly new problems.

And the rules come in several different flavors: There’s one set of rules for the process itself, and a different set of rules for the devices that need to have a certain capacity. For instance, this particular transistor needs to be a minimum size. If it’s smaller, it will fail.

So even if they are older nodes, the number of variations in these processes are pretty big. Particularly if you’re a larger customer, there something that’s likely to be tweaked.

That’s the funny thing with the slowing down of Moore’s Law, and the slower adoption of the newer nodes: Where before everybody automatically went for the new node for the [benefits of] power, cost and speed, now there are lot more variations [in needs], so there are many more design rules.

WWJD: It seems like there should be a different set of design rules for every single design.

Raul Camposano: [laughing] Actually, I have heard this is the case, particularly if you’re a big customer.

And I’ve also heard that is true for memory, because you’re pushing the technology to the limits and, because there’s such a big return, you’re going to replicate this billions of times and need to be confident.

WWJD: Is Moore’s Law dead?

Raul Camposano: Not dead, but just much more complicated.

Academia says it’s Denard scaling. Now every time you want to scale below 64 nanometers, there’s a lot of innovation needed. So you have to choose a different type of transistor, a finFET, or a high-k dielectric. In that sense, Moore’s Law is dead. But we will still go to 5 and 3 nanometers, so it will go on for a little bit longer.

The most exciting things, the thing most talked about, is 3D IC. We’ve learned how to stack things.

And Flash is key. There’s a whole slew of new memories, magnetic memory, and the new 3D XPoint memory from Intel. There’s a lot of innovation going on right now.

WWJD: And a lot of opportunities for young engineers?

Raul Camposano: Yes, the opportunities are alive and well.

My hobby is Silicon Catalyst. This is a bunch of people who are industry veterans, who got together to do an incubator for startups to do chips. We are seeing many, many companies – over 150 in that space.

Our group is asking: Why is so difficult to do a chip?

The problem is you have to spend $50 million to see a chip. Although, if you’re trying to do software, it’s only $50,000 to $100,000.

Part of the cost of the chip is the complexity, but the IoT means a lot less complexity at the edge, so those costs should be lower and there are more opportunities [for startups in that space].

Silicon Catalyst partners with TSMC and Synopsys, who give their tools for free to startups for a certain period of time. The startups don’t have to pay for expensive tools [at the beginning], which lowers the cost of entry.

WWJD: Are you saying EDA tools are too expensive?

Raul Camposano: [laughing] You get what you pay for.

WWJD: Is there more interest in IoT because it utilizes the older nodes?

Raul Camposano: I’m a believer in the market. All the push in the semiconductor industry would actually do something IF there’s real need for it. You reach a certain technical threshold, and then things happen.

Look at speech recognition: AI that is deployed for many, many things – fraud detection, to determine what movie you like, shopping patterns, face recognition. All of that is working because there’s enough computer power that’s cheap enough.

But if you say IoT, you need communication, the stack for WiFi or cellular network. And that’s so cheap and commoditized, along with a micro-controller, you can actually do something useful with it.

One of my favorite examples: Consider the billions of engines that power everything. If they break, they need repair. But if each engine had a little sensor that would make a noise before the engine broke, you would know exactly when it would fail.

So if an IoT device could have a cheap, long-term battery, each engineer would have a little expert system embedded in the big, expensive engine, so they would know from the IoT device when it was about to break.

These are the types of things that are enabled by technology. We can produce small systems to monitor bigger systems.

WWJD: Small, cheap devices to monitor big, expensive ones?

Raul Camposano: [laughing] Yes!

WWJD: Given your background helping to document the history of EDA, what should somebody read if they were going to sit down and read for a month to understand it all.

Raul Camposano: Well, there’s still Mead Conway – that’s a classical book.

And there are a bunch of text books, one by Kurt Keutzer and one by Nani De Macheli. And I actually wrote one, but it’s in German, that gives a good overview of how things are done. In terms of history, there are two books by Dan Nenni. They’re not technical, but they’re entertaining to read.

All of these books would cover about a month’s worth of reading.

WWJD: You wrote a textbook in German?

Raul Camposano: [laughing] It was a long, long time ago.

WWJD: Speaking internationally, what happens to the industry if the US closes its borders?

Raul Camposano: When I was at Synopsys, we had some export technology that was close to the fabs, so in a sense, the problem itself is not new. But the ESD Alliance has brokered this conversation. They have had [an eye] on export control for a very long time.

It’s always been tough, particularly when the supply chain is so integrated. It’s actually hard to imagine it would survive any real closing of the borders. I think what’s more likely is that things will be more expensive, but nobody really wins if you close the whole thing down.

WWJD: What is the value of belonging to the ESD Alliance?

Raul Camposano: In principal, it’s good to have an industry association that looks out for your interests, and those of the industry. The ESD Alliance happens to be that for EDA.

Speaking of international issues, we benefit very concretely from the export control discussions. At Sage, we have not had any problems like that, but still somebody needs to be on the lookout for those issues. So that is the number one value [of the ESD Alliance].

And the market information they provide is the only reliable information for our industry.

WWJD: But Synopsys doesn’t give its numbers.

Raul Camposano: Yeah, but it gives an indication of which sectors in EDA are growing. Every startup should use that information to understand the market.

And last, but not least, they have this series of talks that brings everyone together. It’s a great way to see the CEOs of the large companies when they do the EDA outlook, to see what they are thinking.

It’s also great to talk with the startups, and to attend the series that Jim Hogan has been running for a while. The little companies, the investors, the entrepreneurs can all get together to see what they are doing.

The ESD Alliance is a great way of taking care of the industry that we all love, or otherwise we wouldn’t be in it.

WWJD: What’s the funniest thing that’s happened to you in your career?

Raul Camposano: The most funny one is from the 90s, when industry was still growing.

I was at Synopsys, and in our incredible optimism for success we ordered a bottle of 1946 wine to celebrate. Obviously we were doing very well, and although it was a few thousand dollars, we thought we could expense it – theoretically.

[laughing] Unfortunately somebody was watching. So as we passed the wine around, we also passed the hat around, because we discovered we had to pay for it ourselves.

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The Bio …

Dr. Raúl Camposano is the CEO of Sage. He was previously the CEO of Nimbic, a startup that was acquired by Mentor Graphics in 2014. From 1994 to 2007 he was with Synopsys, where he served as Chief Technology Officer, Senior Vice President, and General Manager.

Prior to joining Synopsys, Camposano was a Director for the German National Research Center for Computer Science, Professor of Computer Science at the University of Paderborn, and a Research Staff Member at the IBM T.J. Watson Research Center. Raúl holds a B.S and M.S. in Electrical Engineering from the University of Chile, and a Ph.D. in Computer Science from the University of Karlsruhe.

Camposano has published over 70 technical papers and written and/or edited three books on electronic design automation. He has contributed significantly to building the design community as a whole serving on numerous editorial, advisory and company boards.

Camposano was also an Advisory Professor at Fudan University and the Chinese Academy of Sciences. He was elected a Fellow of the IEEE in 1999 and to the board of directors of EDA Consortium (now the ESD Alliance) in 2012.

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Tags: Dan Nenni, DRC decks, ESD Alliance, Giovanni De Micheli, IoT, Kurt Keutzer, Mead Conway, Mentor Graphics, Moore's Law, Raul Camposano, Sage, Silicon Catalyst, Synopsys, TSMC

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