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Archive for September 23rd, 2022

CHIPS Act updates; single-SoC automotive architecture; neural rendering; 2022 IEEE roadmap

Friday, September 23rd, 2022

New developments have emerged on the implementation of the U.S ‘CHIPS and Science Act’. More news this week include both Nvidia and Qualcomm advocating the unification of automotive electronic functions in a single system-on-chip. But first, an EDA update.

Synopsys’ unified emulation and prototyping system

Synopsys has announced what it claims is “the industry’s first” unified hardware system for emulation and prototyping, based on its ZeBu EP1 emulation system. Unification enables a single verification hardware system to be used throughout the entire chip development lifecycle. According to Synopsys, users of the ZeBu EP1 system have achieved 19 MHz emulation and 100 MHz prototyping clock performance, enabling them to run large amounts of software pre-silicon and accelerate project schedules. The unified hardware system allows users’ verification and software development requirements to drive how and when to shift capacity between emulation and prototyping, rather than having to estimate early on how much of each resource might be needed.

U.S. CHIPS Act updates: leadership team, innovation coalition

The U.S. government has announced the leadership team which will be responsible for the implementation of the CHIPS and Science Act. Members of the team are Ronnie Chatterji, Michael Schmidt, Eric Lin, Todd Fisher, Donna Dubinsky, and J.D. Grom. Individual roles and bios are detailed in this press release.

More than 100 businesses, startups, universities and nonprofits have formed the American Semiconductor Innovation Coalition (ASIC) with the specific goal of being selected by the Department of Commerce as the partner of choice for the newly created ‘National Semiconductor Technology Center’ and ‘National Advanced Packaging Manufacturing Program’ – both funded through the recently passed ‘CHIPS and Science Act’. Among others, ASIC members include AMD, Analog Devices, Ansys, Applied Materials, Cadence, DuPont, GlobalFoundries, IBM, KLA, Microsoft, Micron, MIT, Nvidia, Samsung, Siemens EDA, Synopsys, Texas Instruments. Some of the coalition members are headquartered in Europe, such as ASML, CEA-Leti, Fraunhofer, imec and Yole Développement. In terms of academic institutions, the ASIC member list currently published on the coalition website does not include neither Stanford University nor UC Berkeley. ASIC claims the ability to stand up an NSTC innovation hub in as little as six months. Among its key capabilities, the coalition mentions the already existing Albany NanoTech Complex.

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