Registration is now open for our annual CEO Executive Outlook co-hosted with Keysight Technologies that will be held Thursday, May 9, in Santa Clara, Calif.

The formal program will begin with two high-profile executives –– Calista Redmond, CEO of RISC-V International, and Patrick Little, CEO of SiFive, a RISC-V IP provider. They will address the evolving RISC-V movement and its effect on the semiconductor design ecosystem.

Immediately following their talk will be a panel of noteworthy executives who will discuss the state of the electronic system design industry and the outlook for the future. I will moderate the panel that features:

• Dave Kelf, CEO of Breker Verification Systems
• Aki Fujimura, CEO from D2S and a member of the ESD Alliance Governing Council
• Niels Fache, Keysight’s VP and GM, Design and Simulation, and a member of the ESD Alliance Governing Council
• John Kibarian, CEO of PDF Solutions and a member of the ESD Alliance Governing Council
• Prakash Narain, CEO at Real Intent and a member of the ESD Alliance Governing Council

The in-person event will be held at Keysight (address below) beginning at 5:30 p.m. P.D.T with networking, dinner and beverages. The program starts at 6:45 p.m. and is open to ESD Alliance and SEMI members at a cost of $25. Pricing for non-members is $50 per person. Click here to register.

Keysight

5301 Stevens Creek Blvd., Building 5

Santa Clara

About the ESD Alliance

For EDACafe readers unfamiliar with the ESD Alliance, a SEMI Technology Community, we represent members of the ecosystem that provides goods and services spanning the conceptualization, design, verification, manufacturing and deployment of semiconductor-based electronic systems. Our industry is essential to the global semiconductor industry as the driving force that enables new electronic systems to be conceived, designed and brought to market.

We focus on initiatives and activities that bring value to our entire industry:

• Coordinating and amplifying the collective and regional voices of our industry.
• Continually promoting the value our industry delivers to the global semiconductor and electronics industry.
• Addressing and defending threats and reducing risks to our industry.
• Achieving efficiencies for our industry.
• Marketing the attractiveness of the design ecosystem as an ideal industry for pursuing a career.
• Enabling networking, sharing and collaboration across our industry.

Contact me at bsmith@semi.org  or Paul Cohen at pcohen@semi.org if you have questions or would like information about joining us.

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Note: The ESD Alliance, a SEMI Technology Community, spearheaded an industry joint development effort to develop a server certification protocol to close a loophole often exploited in software piracy schemes. Cadence Design Systems, Siemens EDA and Synopsys were members of the industry-standard SEMI Server Certification Protocol (SSCP) joint development committee. One of many SSCP supporters is Ted Miracco, a founder and executive vice president of AWR Corporation, now part of Cadence, and someone at the forefront of combatting software piracy. My blog post below, originally appearing on Semiconductor Engineering, is based on an interview I did recently with Ted.

Piracy is a growing concern for all software providers, especially those of us with complex and specialized software, such as chip design automation software that is expensive to develop and maintain.

That’s why the Electronic System Design Alliance (ESD Alliance), a SEMI Technology Community, spearheaded an industry joint development effort to develop a server certification protocol that would close a loophole often exploited in software piracy schemes. Cadence Design Systems, Siemens EDA and Synopsys were members of the industry-standard SEMI Server Certification Protocol (SSCP) joint development committee. SSCP is applicable to protecting any high-value software product(s) that use license management systems to control access to and use of software licenses. It is now available for licensing from SEMI.

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Nominations are being accepted now through June 30 for the 2024 Phil Kaufman Award and the Phil Kaufman Hall of Fame, sponsored by the ESD Alliance, a SEMI Technology Community, and the IEEE Council on Electronic Design Automation (CEDA). Nomination forms are available for download on the SEMI website.

The awards recognize individuals whose contributions made an impact within electronic system design in business, industry direction, promotion, technology and engineering, educational or mentoring.

Established in 1994, the Phil Kaufman Award honors electronic design automation industry pioneer Phil Kaufman, who turned innovative technologies such as silicon compilation and emulation into businesses that have benefited electronic designers.  Last year’s recipient was Dr. Lawrence T. Pileggi, Coraluppi Head and Tanoto Professor of Electrical and Computer Engineering at Carnegie Mellon University.

The Phil Kaufman Hall of Fame posthumously recognizes individuals who made significant and noteworthy contributions through creativity, entrepreneurism and innovation to the electronic system design industry and were not recipients of the Phil Kaufman Award.

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