Archive for the ‘Uncategorized’ Category
Tuesday, February 11th, 2025
Planning for 2025 in-person and online events hosted by the ESD Alliance, a SEMI Technology Community, is under way and it’s time we shared what you can expect to see from us this year. Please mark your calendars and consider attending to network, exchange ideas and meet up with your peers. 
The yearly Executive Outlook co-hosted by Keysight will be held Thursday, May 22, at the Agilent/Keysight campus in Santa Clara, Calif. More details to follow.
Warren Savage, Researcher in the Applied Research Laboratory for Intelligence and Security at the University of Maryland, developed a six-part webinar series called “Savage on Security.” The focus is on the latest security threats to silicon and the mitigation techniques that designers can take to harden their chips against attack. The first webinar “Security Constructs for Heterogenous Integration” was held in January and the recording is available now through On-Demand Registration found at: https://tinyurl.com/2s3h8wwt.
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Thursday, January 23rd, 2025
The ESD Alliance, a SEMI Technology Community, presented the first in a series of six “Savage on Security” webinars moderated by Warren Savage, Researcher in the Applied Research Laboratory for Intelligence and Security at the University of Maryland, January 23.
“Security Constructs for Heterogenous Integration,” was presented by Dr. Ankur Srivastava, Director of the Institute for Systems Research also from the University of Maryland, and addressed new challenges and opportunities as desigbs increasingly move towards heterogenous integration.
Dr. Srivastava opened with a brief perspective on hardware security including the attack model as well as modeling the attacker. He continued with an overview of the security challenges, including some of the key current technical limitations in the globalized supplier ecosystem. The talk included details of three key technical limitations along with current approaches and limitations to each approach. Dr. Srivastava also proposed some potential solutions to some of the key issues along with some direction for future innovations as well as results from some of his security improvement research projects.
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Monday, January 20th, 2025
Note: I recently had a chance to follow up with Lu Dai, Senior Director of Technical Standards at Qualcomm and Chair of Accellera, officially the Accellera Systems Initiative, from an earlier discussion. (See Speeding the Path to Industry Standardization with Accellera posted on SEMI in May 2023.) Below is my blog post that appeared on SEMI’s website.
A reminder that Accellera’s Design Verification Conference DVCon US is coming February 24-27 in San Jose, Calif. Details at: https://dvcon.org/
Electronic Design Automation (EDA) is essential for the entire semiconductor design-to-manufacturing process. EDA tools streamline the design process, speed up development cycles, and ensure higher precision in chip design. Accellera Systems Initiative is an independent standards body that members of the Electronic System Design (ESD) Alliance rely on for its focus on system-level design, modeling and verification standards used extensively throughout the Electronic Design Automation (EDA) ecosystem.
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Thursday, January 16th, 2025
A reminder that it’s your last chance to register for the ESD Alliance “Savage on Security” webinar and raise your Security IQ! It will be held this Thursday, January 23, from 10am until 11am PST.

 Warren Savage
Warren Savage, Researcher at the University of Maryland in the Applied Research Laboratory for Intelligence and Security, will moderate “Security Constructs for Heterogenous Integration.” He and his guest Ankur Srivastava, Director of the Institute for Systems Research at the University of Maryland, will discuss new security challenges that comes from heterogeneous integration.
 Ankur Srivastava
Join us as we start the six-part series that will be held throughout 2025. Warren pledges to bring great minds to this series to raise the general awareness of security in the semiconductor industry.
Registration is $49 for ESD Alliance members and $99 for non-members. Students are free. Member pricing is offered for individuals at companies that are active SEMI members. Registration and details about the webinar are found on the ESD Alliance website.
Can’t make the day or time? No to worry. The webinar will be recorded and registrants will receive a link to the recording
About the ESD Alliance
The ESD Alliance, a SEMI Technology Community, offers initiatives and activities that bring value to our entire industry including:
- Coordinating and amplifying the collective and regional voices of our industry.
- Continually promoting the value our industry delivers to the global semiconductor and electronics industry.
- Addressing and defending threats and reducing risks to our industry.
- Achieving efficiencies for our industry.
- Marketing the attractiveness of the design ecosystem as an ideal industry for pursuing a career.
- Enabling networking, sharing and collaboration across our industry.
Contact me at pcohen@semi.org or Bob Smith at bsmith@semi.org for more details.
Engage with the ESD Alliance
www.esd-alliance.org
ESD Alliance Bridging the Frontier blog
Twitter: ESDAlliance
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Saturday, January 11th, 2025

The Electronic System Design (ESD) industry has plenty to cheer about as we step into the New Year, according to the latest Electronic Design Market Data (EDMD) report from the ESD Alliance, a SEMI Technology Community.
Industry revenue increased 8.8% to $5,114.5 million in Q3 2024 2024 from $4,702.4 million registered in Q3 2023, while the four-quarter moving average, comparing the most recent four quarters to the prior four, rose 13.7%.
Companies tracked in the EDMD report employed 62,417 people globally in Q3 2024, a 4.5% increase over Q3 2023 headcount of 59,737––down 1.2% compared to Q2 2024.
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Wednesday, January 1st, 2025

Chip security is becoming an important consideration for chip designers as semiconductors become increasingly prevalent in our daily lives. With this in mind, the ESD Alliance, a SEMI Technology Community, presents “Security Constructs for Heterogenous Integration,” the first in a six-part “Savage on Security” webinar series on Thursday, January 23, from 10am until 11am PST.
Warren Savage, Researcher at the University of Maryland in the Applied Research Laboratory for Intelligence and Security, will moderate the discussion focused on new security that comes from heterogeneous integration. His guest will be Ankur Srivastava, Director of the Institute for Systems Research at the University of Maryland.
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Wednesday, December 11th, 2024

Warren Savage is an easily recognizable name as the founder and CEO of IPextreme (now Silvaco). In his current role as Researcher at the University of Maryland in the Applied Research Laboratory for Intelligence and Security, he has gotten to know experts in the U.S. semiconductor security research community.
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Monday, December 2nd, 2024

Note: Jeff Lewis is an Executive Advisor who served as Vice President of Marketing and Business Development for Artisan Components, one of the early companies developing blocks of intellectual property that’s now part of Arm. His acumen about the IP business is captured in my blog post published on the SEMI website.
Executive Advisor Jeff Lewis held the position of Vice President of Marketing and Business Development for Artisan Components, one of the early companies developing blocks of intellectual property. Lewis, who worked at Artisan from 1996-2000, and his colleagues were members of an elite group who built the mega-successful IP market, estimated today at $7.48 billion. Arm acquired Artisan Components in 2004 for $913 million.
In my role as Executive Director of ESD Alliance and publisher of the quarterly Electronic Design Market Data (EDMD) report that includes IP, I recently talked with Lewis about what he remembers from the early days of IP.
Smith: You were part of the IP revolution. What were the high points and low points that you most remember?
Lewis: The high point was starting with a relatively blank slate and innovating. Some things worked, some didn’t. We kept trying different things and seeing what would work with plenty of failed tries, successes, and repeats. We got a chance to be on the ground floor of a new industry.
Another high point was watching this nascent industry emerge into a powerhouse. In the ‘90s, EDAC (Electronic Design Automation Consortium, the predecessor to the ESD Alliance) wasn’t interested in tracking IP. As the IP market started growing, EDAC was all over it because it helped pump up the size of the electronic design automation (EDA) industry. Suddenly, IP had become a big enough industry that people were starting to care.
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