Bridging the Frontier 
Bob Smith, Executive Director
Bob Smith is Executive Director of the ESD Alliance responsible for its management and operations. Previously, Bob was senior vice president of Marketing and Business Development at Uniquify, responsible for brand development, positioning, strategy and business development activities. Bob began his … More » Attention Semiconductor Community! Raise Your Security IQ with “Savage on Security” Webinar 2 March 27February 20th, 2025 by Bob Smith, Executive Director
 Warren Savage Get ready for the “Hardware Fuzzing: What? Why? How?”, Webinar 2 in the “Savage on Security” six-part series Thursday, March 27, from 10am-11am PST. Hosted by the ESD Alliance, a SEMI Technology Community, its moderator is Warren Savage, Researcher in the Applied Research Laboratory for Intelligence and Security at the University of Maryland. Raise your security IQ by joining us to learn more about the latest security threats to silicon and the mitigation techniques to harden chips against attack. The webinar will be presented by Dr. Jeyavijayan (JV) Rajendran, Associate Professor in the Department of Electrical and Computer Engineering at Texas A&M University.  Dr. Jeyavijayan Rajendran The webinar will address the increase in attacks and hardware vulnerability abuse that traditional software-based protections cannot prevent. It will introduce a new and radical approach called hardware fuzzing, a technique that could be an answer for detecting vulnerabilities in large-scale designs like modern processors. The webinar will delve into hardware vulnerabilities in hardware description languages, such as Verilog and VHDL. It will explain how hardware fuzzing can be applied to find these vulnerabilities and how it can be combined with existing formal verification techniques to efficiently detect vulnerabilities. Strategies for pinpointing vulnerabilities to accelerate the mitigation process and improve the efficiency of hardware fuzzing using artificial intelligence and machine learning techniques, such as multi-armed bandit (MAB) and large language models (LLM) will be discussed. ESD Alliance Members Exhibit at Next Week’s DVCon in San JoseFebruary 18th, 2025 by Bob Smith, Executive Director
2025 DVCon U.S. (Design & Verification Conference & Exhibition) returns to the DoubleTree Hotel in San Jose, Calif., next week––February 24-27––with a packed program ranging from keynotes, tutorials and workshops to a panel on AI and verification, technical sessions and exhibits. For example, Monday, Opening Day, has a host of workshops and lunch sponsored by Accellera, DVCon’s sponsor. The Welcome Reception in the Bayshore Ballroom runs from 5-6pm. Technical sessions run throughout the day Tuesday and Wednesday. Thursday is a half day of tutorials. Of course, the exhibit floor is a big draw and several of our member companies will have booths including Ausdia, Axiomise, Breker, Cadence, Real Intent, Siemens EDA and Synopsys. Exhibits open Tuesday at 1:30-5pm followed by a reception. Wednesday’s hours are 9am-5pm also followed by a reception and Best Paper presentation. To learn more about 2025 DVCon U.S., visit: https://dvcon.org/. Registration details are at: https://dvcon.org/registration. If you’re curious to learn more about Accellera, I recently got an update from Lu Dai, Senior Director of Technical Standards at Qualcomm and Chair of Accellera. It can be found at: https://tinyurl.com/28rxvhw5 About the ESD Alliance The ESD Alliance, a SEMI Technology Community, offers initiatives and activities that bring value to our entire industry including:
If your company is not currently a member, shouldn’t it consider joining us? Contact Paul Cohen at pcohen@semi.org or me at bsmith@semi.org to get the discussion started. Engage with the ESD Alliance ESD Alliance Bridging the Frontier blog Twitter: ESDAlliance Advanced Peek at ESD Alliance 2025 In-Person, On-Line EventsFebruary 11th, 2025 by Bob Smith, Executive Director
Planning for 2025 in-person and online events hosted by the ESD Alliance, a SEMI Technology Community, is under way and it’s time we shared what you can expect to see from us this year. Please mark your calendars and consider attending to network, exchange ideas and meet up with your peers. The yearly Executive Outlook co-hosted by Keysight will be held Thursday, May 22, at the Agilent/Keysight campus in Santa Clara, Calif. More details to follow. Warren Savage, Researcher in the Applied Research Laboratory for Intelligence and Security at the University of Maryland, developed a six-part webinar series called “Savage on Security.” The focus is on the latest security threats to silicon and the mitigation techniques that designers can take to harden their chips against attack. The first webinar “Security Constructs for Heterogenous Integration” was held in January and the recording is available now through On-Demand Registration found at: https://tinyurl.com/2s3h8wwt. “Savage on Security” Webinar # 1 Recap: Security Constructs for Heterogenous IntegrationJanuary 23rd, 2025 by Paul Cohen
“Security Constructs for Heterogenous Integration,” was presented by Dr. Ankur Srivastava, Director of the Institute for Systems Research also from the University of Maryland, and addressed new challenges and opportunities as desigbs increasingly move towards heterogenous integration. Dr. Srivastava opened with a brief perspective on hardware security including the attack model as well as modeling the attacker. He continued with an overview of the security challenges, including some of the key current technical limitations in the globalized supplier ecosystem. The talk included details of three key technical limitations along with current approaches and limitations to each approach. Dr. Srivastava also proposed some potential solutions to some of the key issues along with some direction for future innovations as well as results from some of his security improvement research projects. An Update on Accellera’s Industry Standards Efforts and Global ReachJanuary 20th, 2025 by Bob Smith, Executive Director
Note: I recently had a chance to follow up with Lu Dai, Senior Director of Technical Standards at Qualcomm and Chair of Accellera, officially the Accellera Systems Initiative, from an earlier discussion. (See Speeding the Path to Industry Standardization with Accellera posted on SEMI in May 2023.) Below is my blog post that appeared on SEMI’s website. A reminder that Accellera’s Design Verification Conference DVCon US is coming February 24-27 in San Jose, Calif. Details at: https://dvcon.org/  Electronic Design Automation (EDA) is essential for the entire semiconductor design-to-manufacturing process. EDA tools streamline the design process, speed up development cycles, and ensure higher precision in chip design. Accellera Systems Initiative is an independent standards body that members of the Electronic System Design (ESD) Alliance rely on for its focus on system-level design, modeling and verification standards used extensively throughout the Electronic Design Automation (EDA) ecosystem. Last Chance to Register for “Savage on Security” Webinar Thursday, January 23, and Raise Your Security IQ!January 16th, 2025 by Paul Cohen
A reminder that it’s your last chance to register for the ESD Alliance “Savage on Security” webinar and raise your Security IQ! It will be held this Thursday, January 23, from 10am until 11am PST.
Warren Savage Warren Savage, Researcher at the University of Maryland in the Applied Research Laboratory for Intelligence and Security, will moderate “Security Constructs for Heterogenous Integration.” He and his guest Ankur Srivastava, Director of the Institute for Systems Research at the University of Maryland, will discuss new security challenges that comes from heterogeneous integration.  Ankur Srivastava Join us as we start the six-part series that will be held throughout 2025. Warren pledges to bring great minds to this series to raise the general awareness of security in the semiconductor industry. Registration is $49 for ESD Alliance members and $99 for non-members. Students are free. Member pricing is offered for individuals at companies that are active SEMI members. Registration and details about the webinar are found on the ESD Alliance website. Can’t make the day or time? No to worry. The webinar will be recorded and registrants will receive a link to the recording About the ESD Alliance The ESD Alliance, a SEMI Technology Community, offers initiatives and activities that bring value to our entire industry including:
Contact me at pcohen@semi.org or Bob Smith at bsmith@semi.org for more details. Engage with the ESD Alliance ESD Alliance Bridging the Frontier blog Twitter: ESDAlliance ESD Alliance Reports $5.1 Billion Industry Revenue in Q3 2024January 11th, 2025 by Paul Cohen
The Electronic System Design (ESD) industry has plenty to cheer about as we step into the New Year, according to the latest Electronic Design Market Data (EDMD) report from the ESD Alliance, a SEMI Technology Community. Industry revenue increased 8.8% to $5,114.5 million in Q3 2024 2024 from $4,702.4 million registered in Q3 2023, while the four-quarter moving average, comparing the most recent four quarters to the prior four, rose 13.7%. Companies tracked in the EDMD report employed 62,417 people globally in Q3 2024, a 4.5% increase over Q3 2023 headcount of 59,737––down 1.2% compared to Q2 2024. Read the rest of ESD Alliance Reports $5.1 Billion Industry Revenue in Q3 2024 Start the New Year with “Savage on Security” Webinar January 23January 1st, 2025 by Paul Cohen
Chip security is becoming an important consideration for chip designers as semiconductors become increasingly prevalent in our daily lives. With this in mind, the ESD Alliance, a SEMI Technology Community, presents “Security Constructs for Heterogenous Integration,” the first in a six-part “Savage on Security” webinar series on Thursday, January 23, from 10am until 11am PST. Warren Savage, Researcher at the University of Maryland in the Applied Research Laboratory for Intelligence and Security, will moderate the discussion focused on new security that comes from heterogeneous integration. His guest will be Ankur Srivastava, Director of the Institute for Systems Research at the University of Maryland. Read the rest of Start the New Year with “Savage on Security” Webinar January 23 ESD Alliance Kicks off “Savage on Security” Webinar Series January 23 with Warren SavageDecember 11th, 2024 by Paul Cohen
Warren Savage is an easily recognizable name as the founder and CEO of IPextreme (now Silvaco). In his current role as Researcher at the University of Maryland in the Applied Research Laboratory for Intelligence and Security, he has gotten to know experts in the U.S. semiconductor security research community. Happy Holidays from the ESD Alliance, a SEMI Technology Community!December 8th, 2024 by Bob Smith, Executive Director
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