Posts Tagged ‘DAC’
Wednesday, May 27th, 2015
Sage CEO Coby Zelnik recently talked with us about how design rules need a formal methodology to account for all the permutations of each rule for today’s and the next generation’s chip designs.
What I found alarming was that he noted how design rules are being built today. An engineer writes the rule based on…well, based on…um…gut feel? The point is that the design rule creation process currently has no specification to govern the creation of the design rule.
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Tags: 52DAC, Chip Design, DAC, Design Automation Conference, Design Rule Manual, Design Rules, DRC, EDA, Electronic Design Automation, foundries, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Lee PR, Lee Public Relations, Sage, Sage Design Automation, Sage-DA, semiconductors, SoC, System on Chip No Comments »
Monday, August 25th, 2014
The EDA editorial brain trust today is the topic of our continuing conversation with Richard Goering and Brian Fuller.
Brian Fuller
Richard Goering
ED: What is the EDA editorial brain trust these days?
RICHARD: Not sure how you’re defining “brain trust,” but if there is one, it’s with the vendors and the independent on-line publications.
ED: Who makes up the EDA editorial brain trust?
RICHARD: If you add it all up, there are still a number of editors with deep EDA and semiconductor experience – they’re just no longer with print publications.
Additionally, there are now a number of writers and bloggers who didn’t start as journalists but who turned in that direction during the transition away from print.
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Tags: Brian Bailey, Brian Fuller, Cadence, Chip Design, Colin Walls, DAC, Dan Nenni, Design Automation Conference, EDA, EDA & IP, EE Times, Electronic Design Automation, Frank Schirrmeister, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Jerry Grzenia, John Cooley, John Day, Lee PR, Lee Public Relations, Michael Posner, Mike Santarini, Paul McLellan, Paul Rako, Peggy Aycinena, Richard Goering, Ron Wilson, Semiconductor Engineering, Semiconductor IP, SemiWiki, SoC, social media, System on Chip, Tom De Schutter, www.leepr.com 2 Comments »
Friday, August 1st, 2014
Simon Bloch of Samsung, speaks out from the audience on the IoT, posing some interesting questions for all.
Bloch: I don’t think that there’s a one-size-fits-all IoT. There’s going to be segmentation. And if we end up in technology segmentation it’s going to be in low power, low latency and high bandwidths. They are going to be applicable to different areas. But it appears to me that technology segmentation is going to be driven by software, and not necessarily by hardware.
Perhaps one of the better examples is what Apple did just this week (editor’s note: week of June 2, 2014) by connecting two IoT devices – two operating systems talking to each other.
So there might be multiple technologies or different IOSs for different IoTs. There might be an opportunity in connecting them to a management layer that talks to one another, like in the areas of apps.
So, is there an opportunity for EDA companies? What is that activity and what is the opportunity to complement the classical EDA?
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Tags: 51DAC, Apple, Chip Design, DAC, Design Automation Conference, EDA, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, Samsung, semiconductors, Simon Bloch, SoC, System on Chip, www.leepr.com No Comments »
Monday, July 28th, 2014
In our continuing series on the IoT, Frank Schirrmeister of Cadence explains what three components of the IoT are important to him.
Schirrmeister: There are three components of importance. Fitbit. ARM’s going very big in that area, with their silicon partners. That’s not the IoT in its completeness. That’s an important component, but the analog mixed-signal components are certainly fun and challenging in this domain.
Then there are two more pieces to the Internet of Things that make me very happy, from a system design perspective: The first one is the hub of my data from the Fitbit. I have at least four hubs that I’m concerned about. My cell phone when I’m mobile. My computer at home. My living room; apparently my TV knows about my habits.
And there is my car. So that’s a hub – a very important piece. And from a system design perspective, there’s system development, emulation, FPGA, virtualization. There is a huge interesting market for us.
Then the third piece is this whole cloud space. That’s where the Intel, ARM, PC battle is waging. And that’s also a very important component of the Internet of Things where all the data crunching has happened and the health data that the health monitor needs to pick up. It is a very attractive market for EDA and will be very important to drive requirements, as well, for us.
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Tags: 51DAC, Cadence, Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, Semiconductor IP, semiconductors, SoC, System on Chip, www.leepr.com No Comments »
Thursday, July 24th, 2014
Bernard Murphy, CTO of Atrenta, talks about the challenges to security that the IoT will bring in our continuing coverage of the IoT panel at DAC…and sees the IoT as a lot like a biological system!!!!
Murphy: The IoT represents a new level of challenge for security – not just because you have to worry about automotive, medical and so on. But also, if you believe the numbers, then the number of potential edge nodes in an IoT is on the order of a trillion or more. That’s two to three orders of magnitude bigger than any existing network you can imagine. It’s about the number of cells you find in a new born baby.
So a trillion edge nodes looks like a biological system. Why is that relevant? Because our approach to security today is very atomic….It’s not a system level approach. You think in terms of system level and you look at analogies with biological systems, then you think in terms of different things.
Of course, you need all the antibodies and antiviruses. But you also want to think about things like signaling – help I’m under attack. It’s not the same thing as defending yourself. You still want to defend. But you also want to signal to your nearest neighbors or an organization around you that you’re under attack. It can isolate you or send in defenses.
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Tags: 51DAC, Atrenta, Chip Design, DAC, Design Automation Conference, EDA, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, Security, semiconductors, SoC, System on Chip, www.leepr.com 3 Comments »
Tuesday, July 22nd, 2014
In today’s snippet from the IoT panel, Randy Smith, VP of Marketing at Sonics, gives his views on how the IoT will affect the EDA and IP industries.
Smith: Time to Market will be more important. The need for software-hardware co-design and speed will equal new applications and solutions for EDA.
A lot of it will be in consumer, which is why there is a lot of hype, because when we think consumer, we think high volumes, perhaps a trillion devices out there. But what’s different in that market as compared to some other markets is that time to market is so much more critical.
So for IoT, you’re going to need the equivalent of agile software development and hardware. You’re going to need to respin that design in three months. It would not be a tremendous surprise if you see some previous ASIC practices like gate arrays start to get more traction again.
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Tags: Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IP, Jim Hogan, Lee PR, Lee Public Relations, Randy Smith, Semiconductor IP, semiconductors, SoC, Sonics, System on Chip, www.leepr.com No Comments »
Monday, July 21st, 2014
As we had previously announced, venture capitalist Jim Hogan moderated a panel at DAC regarding the IoT.
It was an eye opener about all things IoT……or maybe we should call it the IoE (The Internet of Everything), or as one prominent editor noted, the IoW (The Internet of Whatever). Our panelists included: Gary Smith, Market Analyst, GSEDA; Frank Schirrmeister, Group Director, System Development Suite, Cadence; Bernard Murphy, CTO, Atrenta; and Randy Smith, VP of Marketing, Sonics.
Very lively discussion among panelists, but also from the floor! Most notably editor Gabe Moretti of Chip Design and Simon Bloch of Samsung. Bloch, Sr. Director of R&D in mobile consumer wireless devices, posed questions and stimulated discussion to the point where he might be called the unannounced 6th panelist.
Over the next few blogposts, we’ll share snippets of that discussion. Gary Smith will start us off…..
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Tags: 51DAC, Atrenta, Bernard Murphy, Cadence, Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, Gary Smith, GSEDA, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, IP, Jim Hogan, Lee PR, Lee Public Relations, Randy Smith, semiconductors, SoC, Sonics, System on Chip, VC, Wall Street, www.leepr.com No Comments »
Tuesday, May 20th, 2014
As DAC frenzy hits us all, here’s an event that EDA/IP users and media people ought to consider attending.
It’s a Jim Hogan-moderated discussion event on
IoT system design concerns
Jim will 1) introduce the topic; 2) spur, moderate, provoke discussion and 3) sum up what we’ve learned during this session. Of course, this group of speakers are pretty opinionated and won’t need much provocation.
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Tags: Atrenta, Bernard Murphy, Cadence, Chip Design, DAC, Design Automation Conference, EDA, EDA & IP, Electronic Design Automation, Frank Schirrmeister, functional verification, Gary Smith, GSEDA, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Internet of Things, IoT, Jim Hogan, Lee PR, Lee Public Relations, Randy Smith, register transfer level, RTL, semiconductors, SoC, Sonics, System on Chip No Comments »
Tuesday, May 6th, 2014
You’ve got problems with your design rule deck? See what Bryon Moyer and Peggy Aycinena have to say on how to fix those problems……
Testing Out the Rules by Bryon Moyer
Sage-DA: Automating rule checking by Peggy Aycinena
Come check out Sage-DA at Booth 1423 at the Design Automation Conference.
Lee PR does work for Sage-DA.
Tags: automatic rule checking, Chip Design, DAC, Design Automation Conference, DRC, DRC decks, EDA, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?ref=hl, Sage Design Automation, Sage-DA, semiconductors, SoC, System on Chip, www.leepr.com No Comments »
Friday, June 28th, 2013
For some Friday fun….
For those of you who were unable to attend the big 50th DAC party, or you just missed the intro to Asleep at the Wheel, you might find this little video entertaining.
It’s a video of Cowboy Ajoy and Ranger Rhines (aka Ajoy Bose, CEO of Atrenta and Wally Rhines, CEO of Mentor), cutting it up on the Austin City Limits stage to kick off Kickin’ it up in Austin.
Tags: 50DAC, Ajoy Bose, Atrenta, DAC, Design Automation Conference, EDA, Electronic Design Automation, https://www.facebook.com/pages/Lee-Public-Relations/201964499825219?fref=ts, Lee PR, Mentor, Wally Rhines 1 Comment »
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