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Harry Foster
Harry Foster
Chief Scientist Verification at Mentor, A Siemens Business "Design Verification Technology" division. Co-Founder and Executive Editor of the Verification Academy. Prior to Mentor, Harry was Chief Methodologist at Jasper Design Automation's and prior to that Chief Architect at Verplex Systems'. He … More »

The 58th DAC online program is now live—and worth the wait!

 
August 7th, 2021 by Harry Foster

We did it! After over a year’s worth of hard work the DAC Executive Committee finally released the 58th DAC program! And in spite of a mountain of challenges and hurdles we encountered along the way this past year I couldn’t be prouder of the entire team involved in this major milestone.

We started planning the 58th DAC a little over a year ago, and we were confronted with a lot of uncertainty on what to expect for the coming year. Would submissions be down? Would we be able to find inspiring technical speakers to participate in a live event? But we did it!

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#DAC58, 2: Countdown to the Designer, IP and Embedded Track Submission Deadline for DAC 2021

 
December 4th, 2020 by Ambar Sarkar

The Designer and IP tracks have been a vital part of the DAC program since 2010, and I am honored to chair the Designer, IP and Embedded tracks for the 58th DAC. The Embedded track was added to the program last year to highlight this growing topic area in the design community.

Putting on DAC is a huge undertaking, and much of the work involved is done by volunteers from industry and academia. Each track contains submitted work as well as special invited sessions. The Designer, IP and Embedded tracks are co-chaired by Natarajan Viswanathan of Cadence Design, Monica Farkash of AMD, Randy Fish of Synopsys and Mark Kraeling of GE Transportation. Each track also has its own subcommittees to review and plan the year’s program. You can see who’s who on the DAC Executive Committee here.
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#58DAC, #1: Building a Great Conference with a Strong Foundation

 
October 19th, 2020 by Harry Foster

Typically, people use the phrase “Rome wasn’t built in a day” to remind others that time is required to create something truly great. Now, what does this have to do with the Design Automation Conference? While it might seem like we held the 57th DAC just a few weeks ago, time doesn’t stand still. In fact, the 58th DAC team began laying bricks for next year’s event by holding its first kickoff meeting only three weeks after completing this year’s virtual event. And for the 58th DAC, I am truly honored to serve as General Chair. This is a big pair of shoes to fill when you consider the amazing 57 chairs who served before me.

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Make an Impact and Get Involved in Standards Development and Evolution

 
March 12th, 2020 by Lu Dai

Semiconductor design and verification professionals use a variety of languages to model and verify their new ideas in this exciting era of 5G, AI, IoT and autonomous vehicles. Taking a step back, it’s important to understand where these design and verification languages came from, because in the early days of IC and system design there were multiple proprietary languages in circulation. Consider some of the following early languages and simulators used to describe and simulate IC designs:

  • Tegas Design Language (Tegas, 1972)
  • ABEL (Data I/O, 1983)
  • MOSSIM (California Institute of Technology, 1984)
  • Verilog (Gateway Design Automation, 1985)
  • LSim (Silicon Design Labs, 1986)
  • COSMOS (1987)
  • IRSIM (1989)
  • TRANALYZE (1991)

Starting in the 1980s, we began to see two simulation languages take hold commercially: VHDL and Verilog. As the industry adopted standard languages, the task of moving your ASIC design from one foundry to another became much easier, especially as logic synthesis tools like Design Compiler from Synopsys were gradually adopted.

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DVCon U.S. – The Industry’s Must-Attend Design and Verification Conference

 
January 30th, 2020 by Aparna Dey

The DVCon U.S. 2020 conference and exhibition promises to provide the attendees with outstanding technical sessions and discussions on many hot topics, practical learning, networking and an opportunity to preview the latest industry design and verification tools and services from the best in the industry.  We are proud of continuing our tradition of providing an annual technical forum that serves the needs of the design and verification community, organized by dedicated volunteers from the community itself.

Now in its 32nd year, DVCon U.S. has established itself as the must-attend industry and user-focused conference for practicing design and verification engineers, EDA developers and design managers, focusing on design and verification of electronic systems and integrated circuits. We are proud that this conference attracts wide participation from the industry from the smaller to the larger companies in the full program and exhibition. We are also pleased that the success of DVCon U.S. and its format has spawned successful local DVCon events worldwide in Europe, China and India to meet the local needs of these regions.
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SEMI has a Vision …

 
July 2nd, 2019 by Dave Anderson

Over the past several years, SEMI took significant steps on the path to fulfilling its vision to address the entire electronic product chain from design through manufacturing. We’re a step closer to fulfilling this vision as ES Design West debuts next week (July 9-11) as a co-located SEMICON West event at San Francisco’s Moscone Center South Hall.

ES Design West is currently the only North American event to address commercial achievements of the electronic system and semiconductor design and forward-looking, system-centric design approaches. It will promote and highlight how the technology is being applied across the electronic product design, manufacturing and supply chain. 
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(R)evolution of the 56th Design Automation Conference Technical Program

 
April 10th, 2019 by Harry Foster

The Design Automation Conference (DAC), which was founded in 1964, is the longest running and largest conference focused on the design and automation of electronic circuits and systems. And 2019 was a record year in terms of research paper submissions and accepted papers. In fact, this year DAC experienced an impressive 18 percent increase in submissions, as shown in Figure 1.

Figure 1. DAC growth in research paper submissions

Of this year’s 815 submissions that were stringently reviewed, 202 were accepted for publication. This resulted in an acceptance rate of about 25 percent, which is consistent with previous years.
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Verification 3.0: Grab Your Surfboards, the Next Big Wave is Coming

 
April 1st, 2019 by Larry Lapides

I’m that rare person, a native (even second generation) Californian, and grew up going to the Southern California beaches during the summers.  I earned my Red Cross lifeguarding certificates, and was a pretty good bodysurfer in my youth.  The greatest adrenaline rush I’ve ever had is catching a wave so perfectly that I was in the pipeline, not on a surfboard, but just my body half in, half out of the wave.  So, when Joe Costello opened up the inaugural Verification 3.0 Innovation Summit (V3IS) with analogies about waves and rip tides and bodysurfing, he was speaking both my languages, verification and oceans.  There’s a new verification wave coming, Joe said, building strength and speed, and we should be preparing to have a glorious ride to the shore.  The alternative, to not recognize this wave, is to be caught in the rip tide, the undercurrent, with dire consequences.

Image source: Good Free Photos

Joe, and the more than a dozen speakers and companies that spoke and exhibited at V3IS (held last week in Silicon Valley), talked about the various driving factors and technical and business components of this next generation of verification, and also about the previous two generations of verification methodology and tools.

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OMG, This Year’s DAC is in Las Vegas — What Can I Expect?

 
March 11th, 2019 by Thomas Blaesi

The beauty of the Design Automation Conference is that it is always the same and never the same. There is no technical conference like it.  Every year there is the Technical Program, the Designer Track, IP Track and the Exhibition. And the networking opportunities with customers and colleagues is second to none.   But each year is different, and I want to share what I see are the exciting new opportunities with DAC this year.

First DAC will be in Las Vegas and the conference hasn’t been there since 2001 and will definitely draw a larger international crowd to the event. The decision makers, the buyers and the engineering managers all attend from around the world, and my goal is to maximize the opportunities to meet with customers and prospects and inform them of all the cool new technology that Silvaco has. So, I am looking forward to that. Secondly, there are many good locations for holding customer events and meetings. Silvaco, is a founding partner of the don’t-miss-it Stars of IP Party each year and we are looking forward to picking just the right venue for the event. You will hear more about what we decide on in the months ahead.

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DVCon U.S. 2019

 
February 7th, 2019 by Aparna Dey

We hope you will join us for an exciting DVCon U.S. 2019! It is truly a privilege to present the DVCon conference and exhibition that will provide a tremendous opportunity for attendees to survey and learn the latest in design and verification technologies, methodologies, and tools from the best in the industry.

Now in its 31st year, DVCon has established itself over the past three decades as the must-attend industry-focused conference for practicing design and verification engineers, EDA developers, and design managers. We are very proud of our long-standing tradition of providing a very technical forum where colleagues can share practical knowledge. It is an opportunity to discuss challenges and solutions that can be beneficial in your current and upcoming projects, as electronic designs and verification complexities and challenges continue to grow at a rapid pace.
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