Donna Moore, CEO and Chairwoman, LoRa Alliance

By Donna Moore, CEO and Chairwoman, LoRa Alliance

2022 was truly a transformative year for IoT, yielding major shifts in perception and execution, and surpassing milestones of massive deployments. At the LoRa Alliance, our experience was that people moved away from asking about “what” LoRaWAN is, to asking about “how” to deploy, how to find devices, how to partner, how to achieve ROI. IoT clearly has moved into a new stage of mass adoption.

The execution and results of LoRaWAN proof of concepts (PoCs) provide evidence of this market shift. Previously, deploying a PoC took an average of 12 to 18 months. Now, it averages about 6 months. Even better, the ROI on LoRaWAN projects is usually higher than what was originally estimated. Organizations that complete these PoCs quickly realize that the fastest way to compound value is to add new use cases and optimize their operations to benefit from the efficiencies that the solution is providing.

The tremendous headwinds over the past few years—Covid-19, climate change, flooding, fires, droughts, labor shortages, inflation, supply chain constraints—became tailwinds for LoRaWAN technology. In response to the world’s struggle to maintain systems and processes that support daily life, LoRaWAN was deployed to alleviate the problems. LoRaWAN is now used to monitor air and food quality; water quality and availability; infrastructure; and safety, security and health, and much more. While supporting people and the planet, LoRaWAN drives efficiencies that promote business growth and financial stability, making it the leading IoT connectivity solution.

So, what does 2023 hold? The fact is that the world continues to face a growing list of challenges. A major focus in 2023 will be improving infrastructure – buildings, utilities and cities need to find solutions to enhance and improve existing systems that are too expensive to replace outright. When business and governments plan their solutions, they will choose LPWAN IoT and there is huge opportunity for LoRaWAN because of the considerable ROI it generates.

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Interview with Christian Eder, Director Product Marketing at congatec and Chairman of the COM‑HPC Workgroup of PICMG

The PICMG presented the new COM-HPC Mini standard at the recent embedded world trade show. What features does this latest expansion of high-performance computing module standards offer?

Christian: The most significant innovation is that there is now a high-end form factor for credit-card-sized Computer-on-Modules. Like all other COM-HPC module standards, it is positioned above the performance classes targeted by COM Express. So, as far as credit-card-sized modules are concerned, it is positioned above COM Express Mini. The new COM-HPC connector supports transfer rates of more than 32 Gbit/s, which means that it fully covers PCIe Gen 4 and Gen 5, and probably even Gen 6. The interface selection includes a plan for 16 such PCIe lanes, in addition to three graphics interfaces and various fast USB 3.2 or USB 4.0 interfaces. That packs extremely high performance into such a small computing module.

The third generation of credit-card-sized modules is coming: Despite their small dimensions – 95 x 60 mm, according to the current plan – COM-HPC Client modules in Mini format will offer a comprehensive set of interfaces. On the roadmap are, among others, 16x PCIe, 3x graphics and several USB4 interfaces.

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McKinsey, in a December 2021 AI survey, came up with a few conclusions that are worth paying attention to: 1) Nearly two- thirds of the respondents said that their companies’ investments in AI will continue to increase over the next three years 2) Over 64% also run their AI workloads on public or hybrid cloud.

DAC, for the very first time, is offering a unique hands-on workshop for Data Scientists. In this workshop offered by Catalit, Data Scientists (and aspiring Data Scientists) will learn how to formulate, train and improve ML models, by using both classic and deep learning algorithms.
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This year we are experiencing many first with respect to planning the 58^th Design Automation Conference. It’s the first DAC to be rescheduled from its normal summer schedule to December. It’s the first DAC to co-locate with both the RISC-V Summit and SEMICON West. And it is the first DAC to ever go hybrid with both a live and virtual component.

For this year’s Hybrid DAC, we incorporated many lessons learned from last year’s purely virtual DAC. The first lesson learned was that it is not possible to recreate the full experience of a live conference in a virtual world. Indeed, conferences such as DAC attract a global audience, and accommodating multiple time zones must be carefully factored into the plan. In addition, not every activity at a live conference translates into a good virtual experience. So, we learned the importance of providing a good digital journey through a conference by focusing on high-quality technical content.

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We did it! After over a year’s worth of hard work the DAC Executive Committee finally released the 58th DAC program! And in spite of a mountain of challenges and hurdles we encountered along the way this past year I couldn’t be prouder of the entire team involved in this major milestone.

We started planning the 58th DAC a little over a year ago, and we were confronted with a lot of uncertainty on what to expect for the coming year. Would submissions be down? Would we be able to find inspiring technical speakers to participate in a live event? But we did it!

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The Designer and IP tracks have been a vital part of the DAC program since 2010, and I am honored to chair the Designer, IP and Embedded tracks for the 58^th DAC. The Embedded track was added to the program last year to highlight this growing topic area in the design community.

Putting on DAC is a huge undertaking, and much of the work involved is done by volunteers from industry and academia. Each track contains submitted work as well as special invited sessions. The Designer, IP and Embedded tracks are co-chaired by Natarajan Viswanathan of Cadence Design, Monica Farkash of AMD, Randy Fish of Synopsys and Mark Kraeling of GE Transportation. Each track also has its own subcommittees to review and plan the year’s program. You can see who’s who on the DAC Executive Committee here.
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Typically, people use the phrase “Rome wasn’t built in a day” to remind others that time is required to create something truly great. Now, what does this have to do with the Design Automation Conference? While it might seem like we held the 57th DAC just a few weeks ago, time doesn’t stand still. In fact, the 58th DAC team began laying bricks for next year’s event by holding its first kickoff meeting only three weeks after completing this year’s virtual event. And for the 58th DAC, I am truly honored to serve as General Chair. This is a big pair of shoes to fill when you consider the amazing 57 chairs who served before me.

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Over the past several years, SEMI took significant steps on the path to fulfilling its vision to address the entire electronic product chain from design through manufacturing. We’re a step closer to fulfilling this vision as ES Design West debuts next week (July 9-11) as a co-located SEMICON West event at San Francisco’s Moscone Center South Hall.

ES Design West is currently the only North American event to address commercial achievements of the electronic system and semiconductor design and forward-looking, system-centric design approaches. It will promote and highlight how the technology is being applied across the electronic product design, manufacturing and supply chain. 
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