Posts Tagged ‘TSMC’
Thursday, October 25th, 2012
Montreal is not a place that normally comes to mind when you think of EDA. Space Codesign Systems, however, is on a fast track to change that in a classically Canadian way – calm, cool, and collected.
When I spoke with General Manager Dr. Gary Dare on a beautiful afternoon in Southern France at SAME Forum in early October, he explained how the company started in Canada, and the road map they have set out for themselves: “We’re an EDA company, an EDA startup, and we are definitely based in Montreal. If you doubt that EDA has a place in Canada, we will soon convince you otherwise.
“Space Codesign comes from the acronym, SystemC Partition of ACE, which was the 2004 research project at the Ecole Polytechnique [University of Montreal] that our technology is based on. In 2008, Professor Guy Bois and various graduate students associated with the project decided to do a spin-out, and in 2010 Space Codesign Systems went into operation.”
He laughed and added, “Our company has nothing to do with space, however. But it has everything to do with hardware/software co-design – doing it simultaneously, rather than the usual way of ESL hardware design followed by software design. The audience we are targeting is the systems architects who are looking at the algorithmic level and need a route to design exploration and implementation. Our tools give them that route.
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Tags: ARM Connected Community, ASIC, C/C++, Calypto, Canadian VCs, CoWare, ESL, Forte, FPGA, Gary Dare, Global Foundries, Guy Bois, hardware/software codesign, MATLAB, Mentor Graphics, Montreal, NoC, Space Codesign Systems, Synopsys, SystemC, TSMC, UML, University of Montreal, Vista
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Wednesday, September 5th, 2012
There are thousands of companies based in Silicon Valley, but not all of them focus on the long-term play. Valin Corp. does have that focus, however, intentionally balancing their product portfolio across a range of industries, and investing in their employees with equal intensity.
 Company President & CEO Joe Nettemeyer told me in a recent phone call that this strategy has allowed Valin to grow non-stop over the last half-decade: “We’ve achieved growth through a combination of internal development and acquisition, averaging 20-percent growth or more, per year, over the last 5 years, even in spite of a slight hiccup in 2009. We like to invest in industries that are counter-cyclical to each other. When there’s a slow-down in one area, we can cover the slack with revenue in another.
“We’re an infrastructure company working in the wafer-fab-equipment end of the semiconductor industry, designing and building system solutions for companies around the world that make semiconductor-based products. We just completed a project with AKT that makes equipment for large flat-screen panels to retrofit 30 systems for Samsung.
“We’ve also expanded our capabilities in other industries over the years, particularly as a strategic global distributor for Applied Materials. We’re recognized as one of the top 40 industrial distributors in the nation based on our sales revenue, and have just been recognized as one of INC Magazine’s 500/5000 fastest growing companies in America.
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Tags: AKT, Apple, Applied Materials, Emerson Electric, Intel, Joe Nettemeyer, Samsung, TI, TSMC, Valin Corp.
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Wednesday, August 1st, 2012
When Eric Filseth took over as CEO at Ciranova in September 2007, he was already a seasoned EDA veteran having clocked in an accumulated 17 years at Cadence at that point. Now here in 2012, Ciranova has just been acquired by Synopsys and it would seem Filseth’s organization has fulfilled the vision he articulated 5 long years ago.
Per Filseth in 2007: “The problems in analog are very hard. In the digital world, everything is very, very automated, but in the analog world it just isn’t that way. It’s still mostly done by hand and the concept of IP as you consider it in digital – take the RTL and port it to this design or that process – is not there. In analog, it’s still a manual thing for PLLs, and amplifiers, and so on.
“There’s been so much focus on digital SoCs, and things like place and route, there’s been a lot less time spent on analog. Now digital design works fantastically well. You can get a junior engineer with only a couple years’ experience designing thousands of gates a day.
“Just think about it. Over the last 20 years, we’ve had 4 or 5 generations of digital architectures developed but in analog, people are still doing things the way they did it 15 or 20 years ago. Clearly there‘s an opportunity here, and Ciranova is well positioned to take advantage of that opportunity.”
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Tags: Cadence, Ciranova, EDA M&A, Eric Filseth, IPL Alliance, OpenAccess, Paul Lo, SpringSoft, STMicro, Synopsys, TSMC
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Thursday, July 5th, 2012
The SI landscape is a confusing one: What is the true value of a signal integrity analysis tool, and if you’re an EDA vendor, do you need to offer an in-house SI solution to be a true end-to-end provider?
Although Cadence has had a position in signal integrity with their OrCAD Signal Explorer [pre- and post-route topology exploration and transmission line analysis, conceptual, pre-design/schematic topology exploration and simulation, routed or unrouted board topology extraction and analysis] …
… this week Cadence announced it has acquired Silicon Valley-based Sigrity and will now incorporate Sigrity’s PowerSI [full-wave electrical analysis for IC packages and PCBs, identifies trace and via coupling, power/ground bounce, and design regions that are under or over voltage targets] and SystemSI [chip-to-chip signal integrity analysis, including parallel bus analysis and serial link analysis, frequency domain, time domain and statistical analysis] into Cadence’s flow.
This all sounds great as a strategy for beefing up Cadence’s SI offerings, but what does it do to Sigrity’s current set of partners: Apache [owned by Ansys], CST, Mentor Graphics, Synopsys’ HSPICE, TSMC, and Zuken?
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Tags: AJ Incorvaia, Ansoft, Ansys, Apache, Cadence, CST, HSPICE, HyperLynx SI, Lightning Verify, Mentor Graphics, OrCAD, PowerSi, SI, SIgnal Integrity, Sigrity, SiSoft, Synopsys, SystemSI, TSMC, Zoltan Cendes, Zuken
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Tuesday, April 24th, 2012
There’s good news and bad news, in my opinion, with regards to Rajeev Madhavan, founder and CEO of Magma Design Automation, a company that was acquired by Synopsys on February 22, 2012.
The good news it that Rajeev is available to the press for candid interviews like the one included below. The bad news is Rajeev is not going to be part of the EDA landscape as he explores various options for the next phase of his life – and that means the industry will be just that much less interesting, at least for a while.
We spoke by phone in late February.
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Peggy: Hey, Rajeev, how are you doing?
Rajeev: I’m doing pretty much okay as I think about what’s next. I’ve got opportunities, and I’ve got other interests I can now pursue – most people rarely get this kind of opportunity in life, so I’m grateful.
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Tags: Aart de Geus, Andy Bechtolsheim, Cadence, EDA, Intel, M&A, Magma, Magma Design Automation, Mentor Graphics, Rajeev Madhavan, Synopsys, TSMC, Wally Rhines, Wind River
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