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Posts Tagged ‘Harry Foster’

D&VCon: A labor of love for Krolikoski & Co.

Thursday, February 13th, 2014

 

If ever there was a year when you thought to attend DVCon, this should be it, according to a recent phone call with Cadence Fellow Stan Krolikoski, serving as General Chair for the second year in a row. That’s because DVCon 2014 will be serving up the D and the V in equal measure, and won’t be skewed towards the V in DVCon as it has been [perhaps] in the past.

Per Stan, “We’ve gotten feedback every year from attendees that they want more emphasis on design. They say they like verification, but they want more design, so last year I gave marching orders to the Technical Program Committee [headed by Paradigm Works’ Ambar Sarkar] that they should add more people on the review committee who represent design.

“It’s actually been a long time in coming. Although last year was the 25th anniversary of the conference, 10 years ago the name was changed to DVCon. Prior to that, it was HDLCon and the content reflected that name. When the name was changed to DVCon it was supposed to include both design and verification, but [functional verification emerged as the larger focus].”

That focus meant that those types of experts tended to dominate attendance, according to Stan, but that’s been fixed this year: “We will still have excellent functional verification sessions at DVCon – everything for the beginner through to the guru, it’s all there – but we will also have sessions on low-power design, on analog/mixed signal, and on system-level design, as well as IP integration. We’re clearly moving away from just verification in adding lots of design content to the program that’s of interest to our audience.”

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DVCon 2013: in 25 words per sound bite [or less]

Thursday, February 28th, 2013

 

I don’t know about you, but I thought DVCon 2013 in San Jose this week was super. There was a lot of energy, I never heard anybody say the tools are broken (something industry pundits have been droning on about for years), attendance at the conference set a new record, both verification and design guys seemed to indicate that verification is still important enough to remain discrete from design, and SystemVerilog is fulfilling its promise.

The following list of 15 sound bites is not a complete representation of all that was said or debated at DVCon. Nonetheless, it’s an interesting list and reflects some of the information and opinions showcased during the week.

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DVCon 2013: There is such a thing as a free lunch!

Thursday, February 21st, 2013

 

You may think it’s a cliché, but it turns out there is such a thing as a free lunch at DVCon 2013 from February 25th to 28th at the DoubleTree in Santa Clara.

If you attend all 4 days of the conference, you will be the guest of the Accellera Systems Initiative, Mentor Graphics, Cadence, and Synopsys on Monday, Tuesday, Wednesday, and Thursday, respectively. More important than the food, however, is the exposure to the learning — albeit with a heavy dollop of company messaging on top. You should be there.

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