Posts Tagged ‘DAC 2012’
Wednesday, September 12th, 2012
This is a great story: Oski Technology decided to prove the validity and efficiency of Formal Verification, and proposed a public challenge for themselves at DAC – a 72-hour window of time in San Francisco whereby they would attack a design problem never before seen, analyze it, propose a verification plan, and execute on that plan between 5 pm on DAC Sunday and 5 pm on DAC Wednesday.
To get a design problem, Oski Technology put out a request for proposal to different companies. The design could be at any stage in development, but had to include the RTL and some level of specifications for what the architecture should do, as well as some simulations.
Among the 5 respondents, Nvidia’s suggested problem was the most appropriate: It was a design that was still not complete and needed verification. More importantly, Nvidia was not afraid to have possible bugs or flaws in the design made public, a sign of their own confidence. So at 5 pm on Sunday, June 3rd, the Oski Technology team opened the files provided by Nvidia.
I’ll let Vigyan Singhal, Oski Technology’s President and CEO, take the story from there in his own words. Vigyan and I spoke by phone on September 12th, the same day a 6-minute video of the whole process was made available by the company. [Here’s the link on YouTube.]
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The challenge …
 Per Vigyan Singhal: “We had gotten the design in advance from the verification manager at Nvidia, but couldn’t even look at the documentation until 5 pm on Sunday, let alone the RTL files. Then after we opened everything, we looked at the code and the design specifications and went from there.
“Initially during the first night and the next morning, we were mostly doing planning. As we learned more about the design, as is usual with this type of thing, we found some unexpected things. Some of the sub-modules were missing from the design. Nvidia had given us the simulation waves, however, so we could guess the functionality and from there wrote Verilog for those little modules.
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Tags: 72-hour Verification Challenge, DAC 2012, formal verification, NVIDIA, Oski Technology, Vigyan Singhal
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Thursday, June 14th, 2012
Everybody loves the phrase, Four Horsemen of the Apocalypse, but usually don’t remember the specifics. According to Wikipedia, the horsemen each ride a steed of a different color – white, red, black, and pale – and thunder towards us bearing apocalyptic messages of Conquest, War, Famine and Death. You know: The stuff of video games and CGI blockbusters. Ignore them and you lose.
 This year at DAC, GSEDA analyst Gary Smith presented his own apocalyptic message in back-to-back presentations on Sunday evening, June 3rd, and again on Monday morning, June 4th.
Why was Smith’s message apocalyptic? Because he too had four horsemen, and they too cannot be ignored. Without them, products will fail. It’s that simple.
Smith’s horsemen are neither rapacious nor ravaging, however. Instead, they represent the methodical four-step process for co-development of hardware and software, which if done properly moves to completion in carefully controlled lock-step and produces successful results.
Replacing Apocalypse with Approximation, Gary Smith’s Four Horsemen of the Approximation represent Design Exploration (not Conquest), Making Apps (not War), Firmware (not Famine), and Sales & Marketing (not Death).
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Tags: #49DAC, DAC, DAC 2012, EDA360, Four Horsemen of the Apocalypse, Four Horsemen of the Approximation, Gary Smith, GSEDA, Software Virtual Prototypes, SWVP
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Tuesday, June 12th, 2012
The 2012 Design Automation Conference, June 3rd to 7th at Moscone Center in San Francisco, hosted thousands of people. These photos capture only some of the images at the show. They were all taken with an iPad3, an odd but effective form factor for a camera, and were edited on an HP Pavilion dm3. Click on any image to see the larger version.
The YouTube videos below — Gary Smith Blues, Moscone Flags, Forte Bagpipes — were also captured with an iPad3.
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Tags: #49DAC, DAC 2012, DAC photo blog, Forte Bagpipes, Gary Smith blues, Moscone Flags
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Monday, June 11th, 2012
This is the third in a series of blogs describing conversations with small companies that exhibited at 2012 Design Automation Conference in San Francisco, June 4th to 6th.
Since I published the Monday@DAC and Tuesday@DAC blogs, both Dan Nenni and Mike Demler have published attendance numbers for the conference. Interesting that the two sets of numbers see the same cup as either half-full or half-empty.
Per Nenni, the cup’s half-full when comparing DAC 2011 in San Diego to DAC 2012 in San Francisco: “Conference attendees were up to 1901, up 9% on last year. But exhibits only passes were way up to 2783, an increase of 39%. Even booth staff was up 11% to 2704.”
Per Demler, however, the cup’s half-empty when comparing DAC 2009 to DAC 2012, both in San Francisco: “Conference attendees remained essentially flat compared to the last San Francisco DAC, at 1,962 in 2009 versus 1,902 this year. Exhibit-only attendees dropped by nearly 20%, from 3,337 three years ago to 2,703 in 2012. It is interesting to note that Booth Staff actually increased slightly, from 2,697 to 2,704.”
Demler added: “An analysis of the DAC exhibitor list reflects many of the changes that have occurred in the industry. Fewer than 100 companies on the show floor, approximately half of the exhibitors, actually develop design tools.”
Demler also observed that PDF Solutions, a company whose CEO is on the EDAC Board, did not exhibit at DAC 2012. PDF Solutions does not consider itself a design tool company, however – see my interview with John Kibarian here – so even had the company exhibited that may not have alleviated concerns.
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Tags: #49DAC, Ausdia, Bryan Wang, DAC 2012, Dan Nenni, Gary Smith, Hollis Robertson, John Cooley, John Kibarian, Mike Demler, PDF Solutions, Pengwei Qian, SkillCAD, SOCtronics, Sridhar Yarlagadda, Steve Svoboda, SypherMedia International, Tiempo
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Tuesday, June 5th, 2012
Each year, both Gary Smith and John Cooley provide a “Must See” list of companies they recommend attendees seek out and talk with at the Design Automation Conference. DAC 2012 was no different: Gary’s 2012 list had 27 companies and Cooley’s had over 80. Short of one, all of the companies on Gary’s list also appeared on John’s.
However, there were almost 200 exhibitors at DAC in San Francisco so clearly many companies exhibiting were not on these lists, which made for an interesting exercise: Go out onto the Exhibition Hall floor and only talk to companies who are not on the lists.
That’s what I did each day in San Francisco, walking up to booths without an appointment and in the process finding a host of articulate technologists, and their enterprises, which seem to exist under the radar at DAC. On Monday, June 4th, I spoke with 5 of them.
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Tags: AST, Bill Billowitch, CAST IP, DAC 2012, Doulos, Fred Balistreri, Martin Porcelli, Nikos Zervas, Paul Lindemann, Ravi Apte, StarNet Communications, SynTest
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Monday, June 4th, 2012
DAC started with a boom on Sunday night, June 3rd. EDAC reports that 900 people registered for the opening reception, and by the crush of people in Salon 7 in the basement of the San Francisco Marriott Hotel, it looked like everybody showed up. [Although perhaps not quite 900…]
Setting up my word processor on a cocktail table at the back of the crowd, I manged to see numerous thought leaders in EDA as they swam by, in and out of the stream of people that swirled throughout the wine, buzz & music-laden ballroom as EDAC’s Executive Director Bob Gardner’s Jazz Trio entertained up on stage.
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Tags: #49DAC, Bob Gardner, Chris Rowen, DAC, DAC 2012, DAC 2013, Design Automation Conference, EDAC, Jennifer Cermak, Jill Jacobs, Lee Woods, Mentor Graphics, MOD Marketing, MP Associates, OpenAccess, Ry Schwark, Si2, Steve Schulz, Synopsys, Tensilica, Wally Rhines
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Wednesday, May 30th, 2012
Founded in 2000 in France, EVE has been a highly visible part of the EDA landscape for over a decade. In the week prior to the Design Automation Conference in San Francisco, I spoke by phone with Lauro Rizatti, General Manager and Marketing VP for EVA-USA, headquartered in Silicon Valley.
Lauro said that EVE is not releasing specific news at DAC because the company is launching the newest version of its ZeBu emulator in November 2012, the ZeBu-Server2 based on the Xilinx Virtex 6. Following that, EVE will be releasing the ZeBu-Server3 in mid-2014 based on the newest version of Xilinx Virtex 7. It’s not a coincidence that EVE’s hardware, built around ‘off the shelf’ FPGAs, enjoys a new release every two years.
Per Lauro: “Working with FPGAs, we don’t have to wait for internal, custom chip development to move forward. And because we use Xilinx, we ride their technology road map. Every 2 years they launch a new platform, and every 2 years so does Eve. We think we have a brilliant strategy, and the results can be seen in our earnings. We recognized $52 million revenue and $62 million in bookings over the last 12 months.”
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Tags: Cadence, DAC 2012, Emulation, EVE, EVE-USA, Lauro Rizatti, Mentor Graphics, TI OMAP 5430, Xilinx Virtex 6, Xilinx Virtex 7, ZeBu-Server2, ZeBu-Server3
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Monday, May 14th, 2012
Why call this Thermocouple Thursday?
 For two reasons. First, because the rest of the days at DAC 2012 in San Francisco got alliterated:
* Super Sunday
* Marvelous Monday
* Terrible Tuesday
* Wicked Wednesday
And second, because “a thermocouple is a device consisting of two dissimilar metals joined at two points, the potential difference between the two junctions being a measure of their difference in temperature.”*
And if that doesn’t describe Thursday, June 7th, at DAC 2012 what does?
After all, nobody really sticks around for Thursday at DAC unless a) they’re presenting on that day, b) they’ve got a client and/or student presenting on that day, or c) they’re staying through the weekend to vacation in The City.
But people not sticking around for Thursday at DAC is just wrong, because Thursday is the thermocouple day that connects the two main parts of life in EDA.
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Tags: DAC 2012, Design Automation Conference
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Per Vigyan Singhal: “We had gotten the design in advance from the verification manager at Nvidia, but couldn’t even look at the documentation until 5 pm on Sunday, let alone the RTL files. Then after we opened everything, we looked at the code and the design specifications and went from there.
