What Would Joe Do?
Peggy Aycinena is a freelance journalist and Editor of EDA Confidential at www.aycinena.com. She can be reached at peggy at aycinena dot com.
49DAC Unplugged: SynTest, CAST, Apsim, StarNet, Doulos
June 5th, 2012 by Peggy Aycinena
Each year, both Gary Smith and John Cooley provide a “Must See” list of companies they recommend attendees seek out and talk with at the Design Automation Conference. DAC 2012 was no different: Gary’s 2012 list had 27 companies and Cooley’s had over 80. Short of one, all of the companies on Gary’s list also appeared on John’s.
However, there were almost 200 exhibitors at DAC in San Francisco so clearly many companies exhibiting were not on these lists, which made for an interesting exercise: Go out onto the Exhibition Hall floor and only talk to companies who are not on the lists.
That’s what I did each day in San Francisco, walking up to booths without an appointment and in the process finding a host of articulate technologists, and their enterprises, which seem to exist under the radar at DAC. On Monday, June 4th, I spoke with 5 of them.
Ravi Apte has been VP of Marketing at SynTest (Sunnyvale, CA) for over a decade, which is not all that long considering the company was founded in 1990 and is now “22 years young.”
SynTest’s flagship product is TurboDFT, which Ravi described as a design integration tool suite. He said, “If you want to make an ECO and replace this gate with that, TurboDFT makes it a lot easier. Mainly, however, it’s used for inserting memory BIST.”
I asked Ravi what he considers the biggest technology breakthrough in DFT and BIST over the last few years. He answered easily: “It’s compression, and yes we have tools for compression, as do Mentor and Synopsys.”
And who does SynTest sell to? “We sell to small-to-midsize companies, and some big companies like Samsung and Microsoft.”
“Microsoft?” I asked. “Don’t usually think of them as a hardware company.”
“Yes, but think of the Xbox. That’s the part of Microsoft we sell to,” he said.
And why after 22 years, is a company like SynTest still a stand-alone entity with a stand-alone booth at DAC? Ravi again answered easily: “Our founder wanted to stay independent.”
Paul Lindemann is Communications Consultant at CAST IP (Woodcliff Lake, NJ). I asked him why CAST didn’t show up on either of the two “Must See” lists. Paul said, “Because IP is straightforward and exciting to designers, but not necessarily at a show like this.”
If that’s so, I asked, what does CAST get out of exhibiting at DAC? Paul answered, “We have excellent conversations with designers who are actually using our IP, and those conversations help us improve our products.”
Paul introduced me to Nikos Zervas, VP of Marketing at CAST. Nikos said, “CAST is special because we’ve got an alternative to the ARM Cortex series, among others.”
And what makes the company special? Nikos said, “Our IP is special because of its unique features, its code density, the support coming from CAST, the whole environment we provide, and our business terms.
“We don’t mandate royalties, but instead sell license fees per project. So if a project is looking for high volume applications that are cost sensitive, taking out the royalty can make a big difference.”
Fred Balistreri is Sales Director at Applied Simulation Technology (San Jose, CA). He said the company sells various simulators and modelers, including recent releases for signal power and VMI modeling, and simulation for PCBs and IC packages; Apsim also does some IC design.
Balistreri said Apsim’s customers are mainly in Japan and the U.S., with a particular focus on traditional PCB design.
And why does Apsim come to DAC? He said, “It’s not the traffic, but a chance to look at the people at the show and see the trends. A lot of our customers are here, because people fly in to attend from all over the U.S., Europe, and Asia. That gives us a chance to meet with some of the customers that we would not normally meet with, although in our business, we come and go but do not always need to touch bases with them.
“At DAC, however, basically all of the companies are here, and a lot of the people in the industry. We get to interfacing them, which makes exhibiting worthwhile.”
I spoke with Martin Porcelli, Director of Engineering at StarNet Communications (Sunnyvale, CA). He told me the company sells remote access software to big universities, and other customers who use chip design tools from the big EDA vendors.
Per Porcelli, “A lot of our customers have software that runs on Linux, but they have Windows machines at home. With our tools, they can install their EDA software from Mentor, Synopsys, or Cadence on their Linux machines at work, and using our software can run it on Windows at home. That means they can start an application in the office, then continue to work on it at home.”
And who actually wants to work from home? He said, “Unfortunately, many people do. It’s a convenience [that’s expected] today.”
Then why don’t Mentor, Synopsys, or Cadence provide this feature themselves? Porcelli said, “Because it’s not part of their core focus. Their core focus is to provide the tools.”
And what’s next for StarNet? Porcelli said “We are working on StarNet Enterprise, which is an extension of our remote desktop software, but targeted at the enterprise. It will provide the load balancing and fault tolerance that a lot of our big customers have been requesting.”
Note: StarNet was actually on Cooley’s list, but only in a brief, dismissive list of cloud companies.
I spoke with Bill Billowitch, Vice President and General Manager at Doulos (San Jose, CA), and asked what the company was announcing at DAC.
He said, “We’re announcing our UVM workshop, UVM – Now or Never, that will be given this week by John Aynsley, our CTO. At the last DAC, we had standing room only for this course and already have full-up registration for this year’s workshop. UVM is an extremely hot topic!”
And why is that? Billowitch said, “You now have a verification methodology that runs across all the major simulation platforms. It’s the first time I’ve ever seen this kind of thing occur.
“UVM has tremendous potential for the future, and dovetails with Virtual Platform verification as well. That provides compelling reasons for a lot of verification teams to start moving in that direction. Also, it’s been done on SystemVerilog, so if you’re looking for the ability to cross-train a staff that wants to do design and verification, you can now train them to do both.”
I asked Billowitch why Doulos didn’t show up on the “Must See” lists.
He said, “The classes we teach are about very complex topics. To get into the level of detail necessary for a student to walk away with a thorough understanding of UVM, it can take three to five days of full-time training plus labs. Here at DAC, we can give an overview of the class, but to delve into the full details and run at a production mode requires intense training.
“So, if you come to our seminar here at DAC, you will get an overview of what UVM can do for your organization, and then you can decide if you want to equip your staff with solid SystemVerilog skills so you’ll be ready to deploy.
“Our business is principally a training service, where we focus on the standard languages, VHDL, Verilog, etc. We’re a 10-year partner of ARM, and teach all of their hardware and software classes and their core products. We also partner with other FPGA companies, including Xilinx and Altera.”