When people think about design languages, they may not realize that the language is almost irrelevant. The language supports the underlying semantic model and it is this model that is important. EDA has defined design models at the gate level, the register transfer level (RTL) and various forms of behavioral levels. When we talk about RTL, we think about Verilog and VHDL, but they are only the languages that support that model, or very minor variations of it. But what about verification? (more…)
The Breker Trekker
Posts Tagged ‘graphs’
Portable Stimulus – The First Verification Model
Tuesday, April 4th, 2017The Genesis of Portable Stimulus
Tuesday, October 25th, 2016When I first met Adnan Hamid, Breker’s CEO, his philosophical understanding of verification and its implications for electronics was as crystal clear then as it is now. He sees it as the enabler for greater innovation in chips and beyond, and takes it as his life’s mission. His passion was inspiring to me and I did not hesitate for a second when we decided to jointly start Breker. Throughout our journey, I have watched the market converge with what we are building at Breker, and have come to better appreciate my partner, the visionary man. (more…)
