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 The Breker Trekker
Tom Anderson, VP of Marketing
Tom Anderson, VP of Marketing
Tom Anderson is vice president of Marketing for Breker Verification Systems. He previously served as Product Management Group Director for Advanced Verification Solutions at Cadence, Technical Marketing Director in the Verification Group at Synopsys and Vice President of Applications Engineering at … More »

Hey, the EDA World Is Starting to Speak Breker’s Language!

 
October 1st, 2013 by Tom Anderson, VP of Marketing

Last week our friends at Cadence held the grandly named System-to-Silicon Summit not in some grand hotel, but rather at their San Jose offices. While Breker folks of course were not invited, we were curious as to how much SoC verification was addressed. Fortunately, Cadence writer and EDA legend Richard Goering has provided a very nice summary of a panel at the event dealing very much with topics of interest to us and our customers.

Within three paragraphs of Richard’s article, journalist Brian Bailey is already talking about top-down verification with “use cases.” Cadence’s Ziv Binyamini continued the topic by saying “the only way to define the requirements is against the use cases.” Jim Hogan mentioned “scenarios” for defining system behavior. There was also discussion about use cases being valuable for embedded software as well as hardware. To anyone who knows anything about Breker, this all sounds very familiar.

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Let’s Coin a New Phrase: There Is no “I” in “Startup”

 
September 24th, 2013 by Tom Anderson, VP of Marketing

I had planned to write today about the TrekBox module, an essential part of TrekSoC that links the code running in the embedded processors with the I/O pins of an SoC. But, in the course of reviewing my various daily news digests, I read the curiously titled blog post “Tightlipped Unicorns & Monochrome Rainbows” on the Electronic Engineering Times site. It moved my thoughts in other directions entirely, so here is the result.

In the post, Radfan CTO Simon Barker argues that startups should be more honest about the challenges they face in order to obtain help or advice from those who’ve already lived through such adventures. He maintains that company founders who automatically say “Great!” when asked how things are going are missing an opportunity to garner such assistance and are wasting their time at startup events. This position triggered three major lines of thought for me.

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Sneak Preview of the Upcoming SoC Conference in Irvine

 
September 17th, 2013 by Tom Anderson, VP of Marketing

A notice about “early bird” registration for the 11th International System-on-Chip (SoC) Conference, Exhibit, and Workshops arrived in my inbox late last week. It reminded me that this event is coming up quickly (October 23-24) and that, among other things, I’d better get my slides done in time to make it into the Proceedings. My talk is called “The Search for a Truly Unified Verification Methodology” and it will be on the second day at 4:05pm.

If you look at the program, you’ll quickly see that this is one of the most diverse conferences of the year. A wide variety of experts from both academia and the commercial world considers SOC development from many different angles. One minute you may be listening to a talk on high-level system performance measurement, and the next on the silicon structures for a new type of on-chip memory array.

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Two Peas in a Pod: Scenario Models and System Coverage

 
September 10th, 2013 by Tom Anderson, VP of Marketing

In our last technical blog post, we surveyed some of the existing forms of coverage, including their virtues and limitations, and their applicability to SoC designs. We also introduced a new type of metric, system coverage, based on application scenarios that reflect how an end user would actually run applications on the SoC. We closed by claiming that “Breker’s graph-based scenario models are ideal for establishing, measuring, and refining system coverage.” This is the next in a series of posts to explain why and how.

Another earlier post described the Breker approach of “beginning with the end in mind” using graph-based scenario models. In the graphs used by TrekSoC, outcomes appear on the left and inputs appear on the right, reflecting the way that the test case generator works from the desired result toward the setup conditions needed for a particular application scenario.

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If the EDA Industry Has Zombies, What about Vampires?

 
September 3rd, 2013 by Tom Anderson, VP of Marketing

In just a week, my last post has become the most-read since we launched The Breker Trekker blog. That’s fine with me; beneath the intentionally provocative title I had some serious observations on how the EDA industry has evolved over the last couple of decades. My thought for the week is “never underestimate the power of zombies to grab people’s interest.” Mentioning zombies make me think of vampires, since the two are so intertwined in popular culture. There are lots of articles on why we’re so fascinated with these two creatures, and what it means when one is more popular than the other.

I’ll bet that most of you are running ahead of me now and thinking, “Vampires? This must be Breker’s column about venture capitalists.” Indeed this is a post about investors and their role in the formation and fate of EDA companies. Sure, some venture capitalists (VCs) might be viewed as vampires or vultures. But in my personal experience I’ve seen a wide range of investors with very different motivations and methods of interacting with their startups, most of them quite positive.

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An EDA Industry of Startups, Behemoths, Corner Stores, and Zombies?

 
August 27th, 2013 by Tom Anderson, VP of Marketing

From the blog stats it seems clear that late August is a slow time with lots of folks on vacation, so I’ll take a break from the heavy technical topics to chat about the industry. Long before I worked for an EDA company, I was an active participant as a user of EDA tools and as a CAD manager tasked with evaluating them and integrating them together. In that role, I loved working with interesting startups that had new ideas for electronic development.

It was part of my job to follow the EDA industry closely so that we could choose our tool investments based on both strength of technology and likelihood of vendor success. It seemed to me that the industry was divided into only three categories: major leaguers, minor leaguers, and startups. I observed that nearly all EDA startups disappeared after three or four years, with three possible endgames: acquisition, initial public offering (IPO), or bankruptcy.

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If You’re Not Measuring System Coverage, Your SoC Is at Risk

 
August 19th, 2013 by Tom Anderson, VP of Marketing

No SoC verification engineer worthy of the title would argue that coverage is unimportant. Even back in the 1980s, before commercial coverage tools and industry standards were available, leading ASIC teams manually added coverage code into their testbenches. They checked that key state machines visited all legal states or made all legal transitions, or that a processor executed all opcodes in its instruction set, over the course of a simulation test.

Verification teams who ignored coverage in those days were at risk of letting bugs slip through to silicon. The old maxim “if you don’t verify it, it’s broken” summed the situation up well. Today, leading SoC teams have adopted system coverage. Those who are ignoring this aspect of coverage are at risk of letting serious system-level bugs slip through. Let’s talk about system coverage and why it’s different from other metrics in use today.

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Guest Post: A Look at DAC through Ray-Bans

 
August 12th, 2013 by Tom Anderson, VP of Marketing

The electronics industry is still buzzing over the first Design Automation Conference (DAC) held in Austin in June. Bob Smith, Senior Vice President of Marketing and Business Development at Uniquify, offers his perspective:

The Uniquify team looked at this year’s DAC through the Ray-Ban-like sunglasses we used as giveaways and liked what we saw. Exhibitors had cautious optimism prior to this year’s conference and Austin didn’t disappoint. All in all, everyone seemed delighted to be in the capital of the Lone Star State.

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We Weren’t Kidding about Redefining “DAC” and “EDA”

 
August 5th, 2013 by Tom Anderson, VP of Marketing

Back in March I published an opinion piece in Chip Design magazine about redefining “DAC” from “Design Automation Conference” to “Development Automation Conference” and “EDA” from “Electronic Design Automation” to “Electronic Development Automation” to reflect reality. It generated a few comments and got a few people talking but that’s as far as it went.

I certainly didn’t expect a groundswell of support or an overnight change, but I was serious about my reasoning. I think that describing the incredibly complex development process for electronic products as “design” is outdated and not representative of the wide range of skills required.

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Guest Post: A Journey from Nano-Scale SPICE Modeling to Giga-Scale SPICE Simulations at DAC

 
July 29th, 2013 by Tom Anderson, VP of Marketing

The recent guest post from OneSpin looking back at the Design Automation Conference (DAC) in Austin was very popular, so we’ve invited some more of our friends from the EDA community to share their experiences. This week we hear from Lianfeng Yang, Vice President of Marketing at ProPlus Design Solutions, Inc.:

This year’s DAC proved to be a journey from Nano-scale SPICE modeling to Giga-scale SPICE simulations and a place where attendees could learn the secrets of design for yield (DFY) during a Wednesday afternoon pavilion panel.

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