Catching up on some of the news from the last couple of weeks or so, let’s briefly recall that European Union politicians have started discussing about a plan to support the semiconductor industry in the Old Continent. The President of the European Commission, Ursula von der Leyen, has recently preannounced a European Chips Act. “We need to link together our world-class research, design and testing capacities,” she said in her recent State of the Union speech. “We need to coordinate EU and national investment along the value chain. The aim is to jointly create a state-of-the-art European chip ecosystem, including production. That ensures our security of supply and will develop new markets for ground-breaking European tech. (…) We are world leaders. So let’s be bold again, this time with semi-conductors.” Additional details on the upcoming European Chips Act have been provided by European Commissioner Thierry Breton in this blog post, quoting Imec, CEA-Leti and Fraunhofer as key European assets. “I believe that we should explore setting up a dedicated European Semiconductor Fund,” he wrote. “With the European Chips Act, our tech sovereignty is within reach.”
Copyright European Union, 2021. Photographer: Christophe Licoppe
EDA/IP updates: Cadence, MathWorks, Arteris IP, Bluespec, Sigasi
The new Cadence Helium Virtual and Hybrid Studio is a platform that accelerates the creation of virtual and hybrid prototypes of complex systems. According to Cadence, Helium Studio makes verification with a virtual or hybrid model of the SoC orders of magnitude faster than verification with a pure RTL model, and it also enables early software bring-up before the RTL is available. Natively integrated with the Cadence verification engines – including Palladium Z2, Protium X2 and Xcelium – the new Helium Studio accelerates system development by verifying embedded software/firmware on pure virtual and hybrid configurations even when the RTL is not ready.
