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Posts Tagged ‘macro-based sce-miI’

Integrating SystemVerilog and SCE-MI for Faster Emulation Speed

Wednesday, October 9th, 2013

In the last SCE-MI article, we discussed how SCE-MI macro-based infrastructures can speedup SoC design verification time. In SCE-MI 2.1, Accelera introduced a ‘function-based’ infrastructure which is based on SystemVerilog DPI functionality. The SystemVerilog DPI is an interface which can be used to connect SystemVerilog files with foreign languages (C, C++, SystemC, etc).

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